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US 12,721,061 B2Granted
Treatments to enhance material structures
AssigneeApplied Materials, Inc.
InventorsSrinivas Gandikota, Yixiong Yang, Jacqueline Samantha Wrench, Yong Yang, Steven C. H. Hung
Life of this patent
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Abstract
A method of forming a high-κ dielectric cap layer on a semiconductor structure formed on a substrate includes depositing the high-κ dielectric cap layer on the semiconductor structure, depositing a sacrificial silicon cap layer on the high-κ dielectric cap layer, performing a post cap anneal process to harden and densify the as-deposited high-κ dielectric cap layer, and removing the sacrificial silicon cap layer.
Claims14
A method of forming a semiconductor structure, the method comprising:
- pre-cleaning a surface of a substrate;
- forming an interfacial layer on the pre-cleaned surface of the substrate;
- depositing a high-κ gate dielectric layer on the interfacial layer;
- performing a post-deposition anneal process to harden and densify the as-deposited high-κ gate dielectric layer in a nitrogen (N2) and argon (Ar) ambient at a temperature of at a temperature of about 500° C. and about 800° C. and at a pressure of between about 0.01 Torr and 100 Torr;
- performing a plasma nitridation process to insert nitrogen atoms in the deposited high-κ gate dielectric layer and to form a plasma nitridated high-κ gate dielectric layer, the plasma nitridation process comprising forming a plasma from a gas comprising ammonia (NH3) and exposing the high-κ gate dielectric layer exposed to the plasma;
- and
- performing a post-nitridation anneal process, to passivate chemical bonds in the plasma nitridated high-κ gate dielectric layer, the post-nitridation anneal process comprising:
- annealing the deposited high-κ gate dielectric layer in a nitrogen (N2) and argon (Ar) ambient at a temperature of about 700° C. to about 850° C.
5 more elements
A method of forming a semiconductor structure, the method comprising:
- pre-cleaning a surface of a substrate in a first processing chamber;
- forming an interfacial layer on the pre-cleaned surface of the substrate, by thermally oxidizing the substrate utilizing nitrous oxide (N2O) gas, wherein the interfacial layer comprises silicon oxide (SiO2);
- depositing a high-κ gate dielectric layer on the substrate in a second processing chamber;
- performing a re-oxidation process in a third processing chamber, to thermally oxidize the substrate in an oxygen (O2), nitrous oxide (N2O), and H2 ambient at about 400° C. and about 900° C., and at a pressure of between about 0.01 Torr and 100 Torr;
- performing a plasma nitridation process in a fourth processing chamber, to insert nitrogen atoms in the deposited high-κ gate dielectric layer and to form a plasma nitridated high-κ gate dielectric layer in an ammonia ambient after the re-oxidation process;
- and
- performing a post-nitridation anneal process in a fifth processing chamber, to passivate chemical bonds in the plasma nitridated high-κ gate dielectric layer by annealing the high-κ gate dielectric layer in a nitrogen (N2) and argon (Ar) ambient at a temperature of about 700° C. to about 850° C.
4 more elements
A method of forming a semiconductor structure, the method comprising:
- pre-cleaning a surface of a substrate in a first processing chamber;
- forming an interfacial layer on the pre-cleaned surface of the substrate, by thermally oxidizing the substrate utilizing nitrous oxide (N2O) gas, wherein the interfacial layer comprises silicon oxide (SiO2);
- depositing a high-κ gate dielectric layer on the interfacial layer in a second processing chamber, the high-gate dielectric layer comprising hafnium oxide (HfO2) doped with one or more of zirconium (Zr), titanium (Ti), lanthanum (La), ytterbium (Yb), yttrium (Y), and strontium (Sr);
- performing a plasma nitridation process in an ambient consisting of ammonia (NH3) in a third processing chamber, to insert nitrogen atoms in the deposited high-κ gate dielectric layer and to form a plasma nitridated high-κ gate dielectric layer, the plasma nitridation process performed for about 10 seconds to about 300 seconds at a temperature of about 0° C. to about 500° C.;
- and
- performing a post-nitridation anneal process, in a fourth processing chamber, to passivate chemical bonds in the thermal nitridated high-κ gate dielectric layer and thermally oxidize the substrate, the post-nitridation anneal comprising annealing the high-κ gate dielectric layer in a nitrogen (N2) and argon (Ar) ambient at a temperature of about 700° C. to about 850° C.
3 more elements
Dependencies are inferred from the claim text.