H10B 20/363
Gate conductor programmed
Official title: {Gate conductor programmed}
H10B20/363 (Gate conductor programmed) appears on 34 US grants and 21 published applications in this corpus.
Search patents in H10B- Granted patents
- 34
- Published applications
- 21
- Assignees
- 20
- Inventors
- 36
- Latest grant
- 11 Mar 2025
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1979 | 2 | 0 |
| 1980 | 0 | 0 |
| 1981 | 0 | 0 |
| 1982 | 0 | 0 |
| 1983 | 0 | 0 |
| 1984 | 0 | 0 |
| 1985 | 0 | 0 |
| 1986 | 0 | 0 |
| 1987 | 0 | 0 |
| 1988 | 0 | 0 |
| 1989 | 0 | 0 |
| 1990 | 0 | 0 |
| 1991 | 0 | 0 |
| 1992 | 0 | 0 |
| 1993 | 0 | 0 |
| 1994 | 0 | 0 |
| 1995 | 1 | 0 |
| 1996 | 3 | 0 |
| 1997 | 2 | 0 |
| 1998 | 4 | 0 |
| 1999 | 2 | 0 |
| 2000 | 2 | 0 |
| 2001 | 1 | 0 |
| 2002 | 0 | 0 |
| 2003 | 0 | 0 |
| 2004 | 1 | 2 |
| 2005 | 0 | 1 |
| 2006 | 1 | 0 |
| 2007 | 1 | 0 |
| 2008 | 0 | 0 |
| 2009 | 0 | 0 |
| 2010 | 0 | 0 |
| 2011 | 0 | 0 |
| 2012 | 0 | 0 |
| 2013 | 1 | 4 |
| 2014 | 1 | 2 |
| 2015 | 2 | 0 |
| 2016 | 1 | 1 |
| 2017 | 0 | 0 |
| 2018 | 2 | 1 |
| 2019 | 2 | 4 |
| 2020 | 2 | 3 |
| 2021 | 1 | 0 |
| 2022 | 0 | 0 |
| 2023 | 1 | 1 |
| 2024 | 0 | 1 |
| 2025 | 1 | 0 |
| 2026 | 0 | 1 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Small-area high-efficiency read-only memory (ROM) array and method for operating the same11 Mar 2025US 12,250,810 B2Yield Microelectronics Corp.
- Method for converting a floating gate non-volatile memory cell to a read-only memory cell and circuit structure thereof30 May 2023US 11,665,915 B2STMicroelectronics International N. V.
- Array substrate, display panel and display device27 Jul 2021US 11,073,731 B2Boe Technology Group Co., Ltd.
- Strapping structure of memory circuit16 Jun 2020US 10,685,952 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Method for converting a floating gate non-volatile memory cell to a read-only memory cell and circuit structure thereof19 May 2020US 10,658,364 B2STMicroelectronics International N. V.
- Read-only memory device and method7 May 2026US 2026/0129850 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Small-area high-efficiency read-only memory (rom) array and method for operating the same1 Aug 2024US 2024/0260260 A1Yield Microelectronics Corp.
- Method of manufacturing semiconductor device having gate electrodes with dopant of different conductive types21 Dec 2023US 2023/0411395 A1Nanya Technology Corporation
- Array substrate, display panel and display device27 Aug 2020US 2020/0272005 A1Boe Technology Group Co., Ltd.
- Method for converting a floating gate non-volatile memory cell to a read-only memory cell and circuit structure thereof13 Aug 2020US 2020/0258885 A1STMicroelectronics International N.V.
Most cited
By later US patents
- Method for fabricating a multi-stage ROM83US 5,792,697 AUnited Microelectronics Corp. · 1998
- MOS double polysilicon read-only memory and cell45US 4,180,826 AIntel Corporation · 1979
- Method for fabricating a cell structure for mask ROM26US 5,895,241 A1999
- CMOS read only memory with programming at the second metal layer on a two-metal process22US 5,517,061 ANational Semiconductor Corporation · 1996
- Multi-layered memory cell structure14US 7,215,563 B22007