H03K 5/156
Arrangements in which a continuous pulse train is transformed into a train
Official title: Arrangements in which a continuous pulse train is transformed into a train having a desired pattern
H03K5/156 (Arrangements in which a continuous pulse train is transformed into a train) appears on 1,610 US grants and 1,362 published applications in this corpus.
Search patents in H03K- Granted patents
- 1,610
- Published applications
- 1,362
- Assignees
- 494
- Inventors
- 2,609
- Latest grant
- 8 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 4 | 0 |
| 1977 | 1 | 0 |
| 1978 | 1 | 0 |
| 1979 | 2 | 0 |
| 1980 | 5 | 0 |
| 1981 | 2 | 0 |
| 1982 | 4 | 0 |
| 1983 | 7 | 0 |
| 1984 | 7 | 0 |
| 1985 | 1 | 0 |
| 1986 | 6 | 0 |
| 1987 | 1 | 0 |
| 1988 | 3 | 0 |
| 1989 | 6 | 0 |
| 1990 | 4 | 0 |
| 1991 | 6 | 0 |
| 1992 | 11 | 0 |
| 1993 | 7 | 0 |
| 1994 | 6 | 0 |
| 1995 | 11 | 0 |
| 1996 | 15 | 0 |
| 1997 | 7 | 0 |
| 1998 | 15 | 0 |
| 1999 | 19 | 0 |
| 2000 | 27 | 0 |
| 2001 | 25 | 7 |
| 2002 | 36 | 28 |
| 2003 | 31 | 35 |
| 2004 | 40 | 57 |
| 2005 | 47 | 53 |
| 2006 | 59 | 63 |
| 2007 | 57 | 62 |
| 2008 | 56 | 81 |
| 2009 | 54 | 64 |
| 2010 | 85 | 71 |
| 2011 | 81 | 72 |
| 2012 | 50 | 29 |
| 2013 | 62 | 41 |
| 2014 | 42 | 51 |
| 2015 | 48 | 41 |
| 2016 | 56 | 42 |
| 2017 | 59 | 46 |
| 2018 | 49 | 45 |
| 2019 | 64 | 77 |
| 2020 | 84 | 61 |
| 2021 | 77 | 47 |
| 2022 | 53 | 54 |
| 2023 | 53 | 57 |
| 2024 | 65 | 71 |
| 2025 | 64 | 58 |
| 2026 | 35 | 49 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Semiconductor systems with data clock applied8 Sep 2026US 12,732,177 B2SK hynix Inc.
- Dynamic offset calibration circuit and method for operating the same8 Sep 2026US 12,732,178 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Computing system performing duty cycle adjuster training and duty cycle adjuster training method thereof25 Aug 2026US 12,718,864 B2Samsung Electronics Co., Ltd.
- Clock synthesizer18 Aug 2026US 12,712,552 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Memory device, memory system, and operating method of memory device4 Aug 2026US 12,700,463 B2Samsung Electronics Co., Ltd.
- Dynamic offset calibration circuit and method for operating the same8 Oct 2026US 2026/0312577 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Duty cycle correction circuit1 Oct 2026US 2026/0303077 A1SK hynix Inc.
- Semiconductor system and method for operating the same17 Sep 2026US 2026/0280542 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Digital duty cycle corrector circuit17 Sep 2026US 2026/0280543 A1
- Dynamic duty cycle monitor and correction circuit10 Sep 2026US 2026/0269817 A1Apple Inc.
Most cited
By later US patents
- Data processing system generating clock signal from an input clock, phase locked to the input clock and used for clocking logic devices150US 5,133,064 AHitachi, Ltd. · 1992
- I/O duty cycle and skew control117US 7,525,360 B1Altera Corporation · 2009
- Clock signal duty cycle correction circuit and method102US 5,757,218 AInternational Business Machines Corporation · 1998
- Duty-cycle correction circuit93US 6,426,660 B1International Business Machines Corporation · 2002
- Circuitry for the delay adjustment of a clock signal90US 5,945,862 ARambus Inc. · 1999