Memory device, memory system, and operating method of memory device
AssigneeSamsung Electronics Co., Ltd.
InventorsTongsung Kim, Seonkyoo Lee, Younggyu Lee, Taesung Lee
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AssigneeSamsung Electronics Co., Ltd.
InventorsTongsung Kim, Seonkyoo Lee, Younggyu Lee, Taesung Lee
Estimating the term…
Provided is a memory device including a first pad configured to receive a read enable signal from a memory controller, a second pad configured to receive a read duty cycle correct command signal, a first duty correction circuit configured to perform a read duty cycle correct operation, based on the read duty cycle correct command received from the memory controller, when the read enable signal is received, and output a data strobe signal generated based on the read duty cycle correct operation, and a second duty correction circuit configured to receive the data strobe signal from the first duty correction circuit, generate a divided data strobe signal by dividing the received data strobe signal, and compare the received data strobe signal with the divided data strobe signal to perform a write duty cycle correct operation.
A memory device comprising:
An operating method of a memory device, the method comprising:
A memory system comprising:
Dependencies are inferred from the claim text.