H03K 5/1504
Using a chain of active delay devices
Official title: {using a chain of active delay devices (H03K5/15053 takes precedence)}
H03K5/1504 (Using a chain of active delay devices) appears on 93 US grants and 64 published applications in this corpus.
Search patents in H03K- Granted patents
- 93
- Published applications
- 64
- Assignees
- 65
- Inventors
- 180
- Latest grant
- 13 May 2025
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1977 | 1 | 0 |
| 1978 | 0 | 0 |
| 1979 | 0 | 0 |
| 1980 | 0 | 0 |
| 1981 | 0 | 0 |
| 1982 | 0 | 0 |
| 1983 | 0 | 0 |
| 1984 | 0 | 0 |
| 1985 | 1 | 0 |
| 1986 | 0 | 0 |
| 1987 | 1 | 0 |
| 1988 | 0 | 0 |
| 1989 | 0 | 0 |
| 1990 | 0 | 0 |
| 1991 | 2 | 0 |
| 1992 | 3 | 0 |
| 1993 | 3 | 0 |
| 1994 | 3 | 0 |
| 1995 | 4 | 0 |
| 1996 | 4 | 0 |
| 1997 | 1 | 0 |
| 1998 | 3 | 0 |
| 1999 | 1 | 0 |
| 2000 | 1 | 0 |
| 2001 | 1 | 2 |
| 2002 | 1 | 1 |
| 2003 | 2 | 3 |
| 2004 | 4 | 6 |
| 2005 | 4 | 5 |
| 2006 | 3 | 6 |
| 2007 | 3 | 4 |
| 2008 | 4 | 1 |
| 2009 | 1 | 6 |
| 2010 | 5 | 5 |
| 2011 | 6 | 4 |
| 2012 | 3 | 0 |
| 2013 | 1 | 0 |
| 2014 | 2 | 3 |
| 2015 | 2 | 0 |
| 2016 | 1 | 0 |
| 2017 | 2 | 1 |
| 2018 | 0 | 0 |
| 2019 | 1 | 2 |
| 2020 | 3 | 2 |
| 2021 | 4 | 6 |
| 2022 | 5 | 2 |
| 2023 | 2 | 1 |
| 2024 | 2 | 3 |
| 2025 | 3 | 1 |
By publication year. Applications have been published since 2001.
Recent patents
- Method for performing a charge-sharing operation and a charge pump circuit therefor13 May 2025US 12,301,109 B2Samsung Electronics Co., Ltd.
- Low-power inter-die communication using delay lines1 Apr 2025US 12,267,075 B2QUALCOMM Incorporated
- Method for operating semiconductor device including multi-gated I/O system7 Jan 2025US 12,191,851 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Multi-dimensional network interface13 Aug 2024US 12,061,853 B2Arm Limited
- Low-capacitance feedforward level-translator architecture for high-speed multi-phase oscillators9 Apr 2024US 11,955,930 B1Analog Devices, Inc.
- Semiconductor device including i/o system, and method of operating the same8 May 2025US 2025/0150076 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Method for performing a charge-sharing operation and a charge pump circuit therefor26 Sep 2024US 2024/0322677 A1Samsung Electronics Co., Ltd.
- Digital quadrature clock for low jitter applications22 Aug 2024US 2024/0283630 A1Analog Devices, Inc.
- Low-power inter-die communication using delay lines15 Feb 2024US 2024/0056067 A1QUALCOMM Incorporated
- Method for operating semiconductor device including multi-gated i/o system26 Oct 2023US 2023/0344428 A1Taiwan Semiconductor Manufacturing Company.Ltd
Most cited
By later US patents
- Clock signal latency elimination network104US 5,272,729 AInternational Business Machines Corporation · 1993
- Phase-locked delay loop for clock correction95US 5,646,564 AXilinx, Inc. · 1997
- Signal delay apparatus employing a phase locked loop81US 5,179,303 ANorthern Telecom Limited · 1993
- Clock distribution circuit with active de-skewing66US 5,298,866 A1994
- Signal delay apparatus employing a phase locked loop56US 5,146,121 ANorthern Telecom Limited · 1992