Method for operating semiconductor device including multi-gated i/o system

A method of operating a power-on (PO) signal generator which generates a PO signal and includes a supply-variation sensitivity-reducing (SVSR) load coupled between a first reference voltage and a first node, and a first transistor coupled between the first node and a second reference voltage, the SVSR load including a first resistor and a first second transistor coupled in parallel between the first reference voltage and a second node, a second resistor coupled between the second node and a third node, and a second second transistor coupled between the third node and the first node, each of a first control input of the SVSR load and a gate terminal the first transistor being coupled to a monitored voltage as a first control signal, and a second control input of the SVSR load being coupled to a signal on a fourth node as a second control signal, the method including:

• when the monitored voltage is below a threshold voltage of the first transistor, turning off the first transistor,
• pulling the second control signal down to a logical low value,
• pulling each of a first internal voltage on the first node, a second internal voltage on the third node, a third internal voltage of the second second transistor, and the PO signal up to a logical high value;
• and
• at a first point in time when the monitored voltage reaches and then rises above the threshold voltage of the first transistor,
• turning on the first transistor,
• pulling the second control signal up to the logical high value, and
• pulling each of the first internal voltage on the first node, the second internal voltage on the third node, the third internal voltage of the second second transistor, and the PO signal down to the logical low value.

A method of operating a power-on (PO) signal generator which generates a PO signal and includes a supply-variation sensitivity-reducing (SVSR) load coupled between a first reference voltage and a first node, and a switch coupled between the first node and a second reference voltage, the SVSR load including a first resistor and a first second transistor coupled in parallel between the first reference voltage and a second node, a second resistor coupled between the second node and a third node, and a second second transistor coupled between the third node and the first node, each of a first control input of the SVSR load and a control input of the switch being coupled to a monitored voltage as a first control signal, and a buffer having an input coupled to the first node and an output configured to provide the PO signal, the method comprising:

• monitoring a state of the monitored voltage and adaptively generating the PO signal;
• and
• the adaptively generating the PO signal including:
• changing a state of the PO signal based on the monitored voltage the switch, the buffer, and a threshold voltage of the SVSR load;
• and
• varying the threshold voltage.