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US 2025/0150076 A1Published application
Semiconductor device including i/o system, and method of operating the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsShao-Te WU, Chia-Jung CHANG, Shih-Peng CHANG
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Abstract
An input/output (I/O) system includes an output level shifter coupled between an output node of a core circuit and a first node; an output driver coupled between the first node and an external terminal of the I/O system; and a gating signal generator configured to enable the output driver after an output signal of the output level shifter has stabilized.
Claims20
An input/output (I/O) system comprising:
- an output level shifter coupled between an output node of a core circuit and a first node;
- an output driver coupled between the first node and an external terminal of the I/O system;
- and
- a gating signal generator configured to enable the output driver after an output signal of the output level shifter has stabilized.
1 more element
An input/output (I/O) system comprising:
- an output level shifter coupled between an output node of a core circuit and a first node;
- an output driver coupled between the first node and an external terminal of the I/O system;
- and
- a gating signal generator configured to provide an output driver gating signal to the output driver, wherein:
- the output driver gating signal is based on a logic operation on a first signal and a second signal,
- the first signal being an inverted signal of a first timing signal, which is a delayed signal of a power-on control signal, and
- the second signal being an inverted signal of a second timing signal, which is a delayed signal of the first timing signal.
4 more elements
A method of operating an input/output (I/O) system, the method comprising:
- delaying a power-on control signal to generate a first timing signal;
- inverting the first timing signal to generate a first inverted timing signal;
- delaying the first timing signal to generate a second timing signal;
- inverting the second timing signal to generate a second inverted timing signal
- performing a logic operation on the first inverted timing signal and the second inverted timing signal to generate an output driver gating signal;
- and
- providing the output driver gating signal to an output driver of the I/O system.
4 more elements
Dependencies are inferred from the claim text.