G11C 7/1039
Using pipelining techniques, i.e. using latches between functional memory parts
Official title: {using pipelining techniques, i.e. using latches between functional memory parts, e.g. row/column decoders, I/O buffers, sense amplifiers}
G11C7/1039 (Using pipelining techniques, i.e. using latches between functional memory parts) appears on 1,456 US grants and 1,326 published applications in this corpus.
Search patents in G11C- Granted patents
- 1,456
- Published applications
- 1,326
- Assignees
- 236
- Inventors
- 1,763
- Latest grant
- 29 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1980 | 1 | 0 |
| 1981 | 0 | 0 |
| 1982 | 0 | 0 |
| 1983 | 0 | 0 |
| 1984 | 2 | 0 |
| 1985 | 1 | 0 |
| 1986 | 0 | 0 |
| 1987 | 2 | 0 |
| 1988 | 1 | 0 |
| 1989 | 5 | 0 |
| 1990 | 4 | 0 |
| 1991 | 4 | 0 |
| 1992 | 1 | 0 |
| 1993 | 4 | 0 |
| 1994 | 4 | 0 |
| 1995 | 8 | 0 |
| 1996 | 20 | 0 |
| 1997 | 30 | 0 |
| 1998 | 38 | 0 |
| 1999 | 39 | 0 |
| 2000 | 56 | 0 |
| 2001 | 44 | 23 |
| 2002 | 47 | 40 |
| 2003 | 38 | 41 |
| 2004 | 35 | 34 |
| 2005 | 26 | 38 |
| 2006 | 33 | 40 |
| 2007 | 27 | 44 |
| 2008 | 48 | 38 |
| 2009 | 33 | 28 |
| 2010 | 25 | 24 |
| 2011 | 35 | 23 |
| 2012 | 30 | 31 |
| 2013 | 35 | 29 |
| 2014 | 21 | 39 |
| 2015 | 33 | 32 |
| 2016 | 40 | 41 |
| 2017 | 52 | 37 |
| 2018 | 39 | 37 |
| 2019 | 48 | 55 |
| 2020 | 60 | 62 |
| 2021 | 63 | 65 |
| 2022 | 72 | 112 |
| 2023 | 101 | 158 |
| 2024 | 128 | 81 |
| 2025 | 80 | 55 |
| 2026 | 43 | 119 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
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- Analog to digital converter with sample and hold circuitry24 Sep 2026US 2026/0290416 A1Avago Technologies International Sales Pte. Limited
- Wafer-on-wafer formed memory and logic17 Sep 2026US 2026/0279433 A1Micron Technology, Inc.
- Semiconductor apparatus and semiconductor system having independent data input/output period, and operating method of the semiconductor system27 Aug 2026US 2026/0253625 A1SK hynix Inc.
- Non-volatile memory device, storage device, and method of operating the storage device27 Aug 2026US 2026/0253648 A1Samsung Electronics Co., Ltd.
Most cited
By later US patents
- Flash eeprom system602US 5,297,148 ASunDisk Corporation · 1994
- Flash EEprom system524US 5,602,987 ASanDisk Corporation · 1997
- Flash EEPROM system with erase sector select437US 5,418,752 ASunDisk Corporation · 1995
- High speed DRAM architecture with uniform access latency419US 8,503,250 B2Mosaid Technologies Incorporated · 2013
- Non-volatile memory system card with flash erasable sectors of EEprom cells including a mechanism for substituting defective cells249US 5,535,328 ASanDisk Corporation · 1996