Non-volatile memory system card with flash erasable sectors of EEprom cells including a mechanism for substituting defective cells

A method of operating a computer system including a processor and a memory system, wherein the memory system includes an array of non-volatile floating gate memory cells partitioned into a plurality of sectors that individually include a distinct group of said array of memory cells that are erasable together as a unit, comprising:

• providing said memory array and a memory controller within a card that is removably connectable to the computer system, said controller being connectable to said processor for controlling operation of the array when the card is connected to the computer system,
• reserving a portion of the memory cells within the individual sectors as spare cells, remaining cells of the individual sectors being designated for storing data,
• enabling the controller to detect when a cell within the data portion of a sector becomes defective,
• causing the controller to store an address of such a detected defective cell, and
• thereafter causing the controller to substitute for the defective cell a redundant cell from the spare cells of the sector in which the defective cell is detected.