G11C 7/1027

Static column decode serial bit line access mode, i.e. using an enabled

Official title: {Static column decode serial bit line access mode, i.e. using an enabled row address stroke pulse with its associated word line address and a sequence of enabled bit line addresses}

G11C7/1027 (Static column decode serial bit line access mode, i.e. using an enabled) appears on 195 US grants and 173 published applications in this corpus.

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195
Published applications
173
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69
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G11C 7/1027: granted patents and published applications per publication year
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198810
198910
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199310
199400
199520
199620
199720
199830
199970
200040
200143
200239
2003913
20041317
2005613
20062422
20071523
20081514
20091514
20101315
2011163
201296
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201463
201551
201631
201721
201822
201921
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202122
202210
202324
202420
202512

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