G11C 7/1009
Data masking during input/output
Official title: {Data masking during input/output}
G11C7/1009 (Data masking during input/output) appears on 281 US grants and 295 published applications in this corpus.
Search patents in G11C- Granted patents
- 281
- Published applications
- 295
- Assignees
- 72
- Inventors
- 482
- Latest grant
- 22 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1999 | 1 | 0 |
| 2000 | 0 | 0 |
| 2001 | 0 | 0 |
| 2002 | 0 | 0 |
| 2003 | 0 | 1 |
| 2004 | 1 | 1 |
| 2005 | 1 | 1 |
| 2006 | 0 | 0 |
| 2007 | 1 | 0 |
| 2008 | 0 | 0 |
| 2009 | 0 | 6 |
| 2010 | 5 | 4 |
| 2011 | 3 | 4 |
| 2012 | 3 | 7 |
| 2013 | 2 | 7 |
| 2014 | 11 | 17 |
| 2015 | 9 | 15 |
| 2016 | 20 | 15 |
| 2017 | 16 | 13 |
| 2018 | 20 | 19 |
| 2019 | 23 | 28 |
| 2020 | 30 | 22 |
| 2021 | 23 | 29 |
| 2022 | 28 | 28 |
| 2023 | 37 | 34 |
| 2024 | 25 | 21 |
| 2025 | 17 | 16 |
| 2026 | 5 | 7 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Apparatuses and methods for simultaneous in data path compute operations22 Sep 2026US 12,743,206 B2
- Floating data line circuit and method18 Aug 2026US 12,712,027 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Data destruction via dram refresh suppression28 Jul 2026US 12,694,922 B2Rambus Inc.
- System and method for improving efficiency of multi-storage-row compute-in-memory26 May 2026US 12,640,174 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Memory architecture supporting both conventional memory access mode and digital in-memory computation processing mode19 May 2026US 12,633,323 B2STMicroelectronics International N. V.
- Command decoder masking circuitry11 Jun 2026US 2026/0162710 A1Micron Technology, Inc.
- Clock stabilization circuit, system, and operating method of system2 Apr 2026US 2026/0094632 A1SK hynix Inc.
- System and memory with configurable metadata portion12 Feb 2026US 2026/0045314 A1QUALCOMM Incorporated
- System and memory with configurable metadata portion12 Feb 2026US 2026/0045315 A1QUALCOMM Incorporated
- System and memory with configurable metadata portion12 Feb 2026US 2026/0045316 A1QUALCOMM Incorporated
Most cited
By later US patents
- Write operations in spin transfer torque memory51US 9,299,412 B2Intel Corporation · 2016
- Semiconductor memory device having on-die-termination device and operation method thereof43US 7,663,946 B2Hynix Semiconductor Inc. · 2010
- Semiconductor memory device having inverting circuit and controlling method there of36US 9,640,233 B2Samsung Electronics Co., Ltd. · 2017
- Independent multi-plane read and low latency hybrid read28US 9,792,995 B1SanDisk Technologies LLC · 2017
- System and memory with configurable metadata portion23US 12,230,347 B2QUALCOMM Incorporated · 2025