G11C 16/26
Sensing or reading circuits
Official title: Sensing or reading circuits; Data output circuits
G11C16/26 (Sensing or reading circuits) appears on 11,014 US grants and 11,139 published applications in this corpus.
Search patents in G11C- Granted patents
- 11,014
- Published applications
- 11,139
- Assignees
- 740
- Inventors
- 8,203
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 3 | 0 |
| 1977 | 0 | 0 |
| 1978 | 7 | 0 |
| 1979 | 4 | 0 |
| 1980 | 1 | 0 |
| 1981 | 3 | 0 |
| 1982 | 4 | 0 |
| 1983 | 2 | 0 |
| 1984 | 7 | 0 |
| 1985 | 3 | 0 |
| 1986 | 6 | 0 |
| 1987 | 4 | 0 |
| 1988 | 11 | 0 |
| 1989 | 13 | 0 |
| 1990 | 21 | 0 |
| 1991 | 28 | 0 |
| 1992 | 24 | 0 |
| 1993 | 30 | 0 |
| 1994 | 42 | 0 |
| 1995 | 48 | 0 |
| 1996 | 54 | 0 |
| 1997 | 56 | 0 |
| 1998 | 68 | 0 |
| 1999 | 73 | 0 |
| 2000 | 119 | 0 |
| 2001 | 117 | 32 |
| 2002 | 124 | 145 |
| 2003 | 134 | 136 |
| 2004 | 134 | 159 |
| 2005 | 133 | 169 |
| 2006 | 152 | 207 |
| 2007 | 165 | 202 |
| 2008 | 192 | 224 |
| 2009 | 191 | 227 |
| 2010 | 194 | 217 |
| 2011 | 218 | 259 |
| 2012 | 239 | 263 |
| 2013 | 282 | 312 |
| 2014 | 323 | 399 |
| 2015 | 446 | 422 |
| 2016 | 611 | 566 |
| 2017 | 593 | 529 |
| 2018 | 531 | 506 |
| 2019 | 618 | 706 |
| 2020 | 791 | 835 |
| 2021 | 791 | 837 |
| 2022 | 801 | 1004 |
| 2023 | 807 | 874 |
| 2024 | 798 | 711 |
| 2025 | 621 | 633 |
| 2026 | 377 | 565 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Managing read timing in semiconductor devices6 Oct 2026US 12,754,674 B2Macronix International Co., Ltd.
- Address fault detection in a memory system6 Oct 2026US 12,755,788 B2Silicon Storage Technology, Inc.
- Semiconductor memory devices with dielectric fin structures6 Oct 2026US 12,755,790 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Architecture and method for NAND memory operation6 Oct 2026US 12,755,794 B2Yangtze Memory Technologies Co., Ltd.
- Sense voltage adjustment among multiple erase blocks6 Oct 2026US 12,755,795 B2Micron Technology, Inc.
- Nonvolatile memory device supporting high-efficiency i/o interface8 Oct 2026US 2026/0310383 A1Samsung Electronics Co., Ltd.
- Memory structure, memory device and operating method thereof8 Oct 2026US 2026/0311763 A1Macronix International Co., Ltd.
- Semiconductor structure, method of operating thereof, and semiconductor device8 Oct 2026US 2026/0311765 A1Yangtze Memory Technologies Holding Co., Ltd.
- Resample start voltage for calibration in a program operation improvement8 Oct 2026US 2026/0311768 A1Micron Technology, Inc.
- Storage device updating operation voltages based on a number of off cells and method of operating the same8 Oct 2026US 2026/0311770 A1Samsung Electronics Co., Ltd.
Most cited
By later US patents
- Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping1,211US 6,011,725 ASaifun Semiconductors Ltd. · 2000
- Multi-state EEprom read and write circuits and techniques1,175US 5,172,338 ASunDisk Corporation · 1992
- Multi-state memory1,008US 6,222,762 B1SanDisk Corporation · 2001
- High density non-volatile flash memory without adverse effects of electric field coupling between adjacent floating gates827US 5,867,429 ASanDisk Corporation · 1999
- Memory management system and method627US 8,200,887 B2Violin Memory, Inc. · 2012