Semiconductor structure, method of operating thereof, and semiconductor device

A semiconductor structure, comprising:

• a stack structure comprising a gate layer and an insulating layer spaced apart with each other, wherein the gate layer comprises a plurality of gate layers, and the plurality of gate layers comprise a plurality of first gate layers and a plurality of second gate layers;
• a memory structure extending through the stack structure, and comprising a plurality of memory cells coupled to the first gate layers and a plurality of dummy cells coupled to the second gate layers;
• and
• a connection structure comprising a conductive material and being in contact with and electrically connected to the plurality of second gate layers.

A semiconductor device, comprising:

• one or more or
• one or more semiconductor structures each comprising:
• a memory array configured to perform a first operation and a peripheral circuit coupled to the memory array, wherein the memory array comprises a memory string, a first end of the memory string is connected to a source line, a second end of the memory string is connected to a bit line, and the memory string comprises a plurality of memory cells and a plurality of dummy cells, and wherein
• the plurality of memory cells are coupled to a plurality of first gate layers, the plurality of dummy cells are coupled to a plurality of second gate layers, first ends of the plurality of second gate layers are coupled to the plurality of dummy cells respectively, second ends of the plurality of second gate layers commonly contact and are electrically connected to a connection structure, and the connection structure comprises a conductive material;
• or
• one or more semiconductor structures each comprising:
• a stack structure comprising a gate layer and an insulating layer spaced apart with each other, wherein the gate layer comprises a plurality of gate layers, and the plurality of gate layers comprise a plurality of first gate layers and a plurality of second gate layers;
• a memory structure extending through the stack structure, and comprising a plurality of memory cells coupled to the first gate layers and a plurality of dummy cells coupled to the second gate layers;
• and
• a connection structure comprising a conductive material and being in contact with and electrically connected to the plurality of second gate layers;
• and
• a processing circuit connected to the semiconductor structure and configured to:
• convert analog calculation information obtained by the first operation performed by the semiconductor structure into digital information;
• and
• perform a second operation on the digital information,
• wherein the analog calculation information comprises a first current passing through the memory string of the semiconductor structure.