G06F 9/38873
Iterative single instructions for multiple data lanes [simd]
Official title: {Iterative single instructions for multiple data lanes [SIMD]}
G06F9/38873 (Iterative single instructions for multiple data lanes [simd]) appears on 129 US grants and 137 published applications in this corpus.
Search patents in G06F- Granted patents
- 129
- Published applications
- 137
- Assignees
- 45
- Inventors
- 282
- Latest grant
- 28 Jul 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1981 | 1 | 0 |
| 1982 | 0 | 0 |
| 1983 | 0 | 0 |
| 1984 | 0 | 0 |
| 1985 | 0 | 0 |
| 1986 | 1 | 0 |
| 1987 | 0 | 0 |
| 1988 | 0 | 0 |
| 1989 | 0 | 0 |
| 1990 | 0 | 0 |
| 1991 | 1 | 0 |
| 1992 | 0 | 0 |
| 1993 | 0 | 0 |
| 1994 | 0 | 0 |
| 1995 | 0 | 0 |
| 1996 | 9 | 0 |
| 1997 | 4 | 0 |
| 1998 | 12 | 0 |
| 1999 | 1 | 0 |
| 2000 | 2 | 0 |
| 2001 | 0 | 0 |
| 2002 | 0 | 0 |
| 2003 | 1 | 0 |
| 2004 | 0 | 0 |
| 2005 | 0 | 0 |
| 2006 | 0 | 1 |
| 2007 | 0 | 0 |
| 2008 | 1 | 1 |
| 2009 | 0 | 0 |
| 2010 | 0 | 9 |
| 2011 | 0 | 3 |
| 2012 | 5 | 6 |
| 2013 | 8 | 4 |
| 2014 | 5 | 18 |
| 2015 | 8 | 7 |
| 2016 | 5 | 9 |
| 2017 | 17 | 10 |
| 2018 | 7 | 2 |
| 2019 | 7 | 7 |
| 2020 | 2 | 4 |
| 2021 | 4 | 5 |
| 2022 | 2 | 5 |
| 2023 | 5 | 18 |
| 2024 | 8 | 7 |
| 2025 | 9 | 14 |
| 2026 | 4 | 7 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Almost-indirect convolution in quantized neural networks28 Jul 2026US 12,694,262 B2Smart Engines Service, LLC
- Instruction set architecture support for a load global pointer instruction21 Apr 2026US 12,608,199 B2Intel Corporation
- Implementing specialized floating point instructions on an integer pipeline for accelerating dynamic programming algorithms17 Feb 2026US 12,554,493 B2NVIDIA Corporation
- Efficient execution of atomic instructions for single instruction, multiple thread (SIMT) architectures10 Feb 2026US 12,547,413 B2NVIDIA Corporation
- Systems and methods for automatically generating computer programming code and schedules and comparing their performance18 Nov 2025US 12,474,903 B1The Math Works, Inc.
- Preventing performance of conditional instructions9 Jul 2026US 2026/0195131 A1NVIDIA Corporation
- Enabling performance of conditional instructions9 Jul 2026US 2026/0195139 A1NVIDIA Corporation
- Fully homomorphic encryption (fhe) operations on a unified fhe accelerator2 Jul 2026US 2026/0189363 A1Intel Corporation
- Flexibly programmable processing unit25 Jun 2026US 2026/0178522 A1Nokia Solutions and Networks Oy
- Method and device with profile data generation4 Jun 2026US 2026/0154079 A1Samsung Electronics Co., Ltd.
Most cited
By later US patents
- Advanced parallel processor including advanced support hardware237US 5,588,152 AInternational Business Machines Corporation · 1996
- Floating point for simid array machine169US 5,809,292 AInternational Business Machines Corporation · 1998
- Advanced parallel array processor computer package142US 5,734,921 AInternational Business Machines Corporation · 1998
- Synchronous processor with simultaneous instruction processing and data transfer111US 5,038,282 AMassachusetts Institute of Technology · 1991
- Advanced massively parallel computer with a secondary storage device coupled through a secondary storage interface110US 5,867,723 ASarnoff Corporation · 1999