G06F 9/321
Program or instruction counter
Official title: {Program or instruction counter, e.g. incrementing}
G06F9/321 (Program or instruction counter) appears on 435 US grants and 375 published applications in this corpus.
Search patents in G06F- Granted patents
- 435
- Published applications
- 375
- Assignees
- 178
- Inventors
- 916
- Latest grant
- 1 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 2 | 0 |
| 1977 | 4 | 0 |
| 1978 | 2 | 0 |
| 1979 | 2 | 0 |
| 1980 | 2 | 0 |
| 1981 | 5 | 0 |
| 1982 | 1 | 0 |
| 1983 | 1 | 0 |
| 1984 | 1 | 0 |
| 1985 | 2 | 0 |
| 1986 | 0 | 0 |
| 1987 | 1 | 0 |
| 1988 | 1 | 0 |
| 1989 | 1 | 0 |
| 1990 | 1 | 0 |
| 1991 | 5 | 0 |
| 1992 | 1 | 0 |
| 1993 | 5 | 0 |
| 1994 | 5 | 0 |
| 1995 | 2 | 0 |
| 1996 | 12 | 0 |
| 1997 | 11 | 0 |
| 1998 | 15 | 0 |
| 1999 | 9 | 0 |
| 2000 | 8 | 0 |
| 2001 | 5 | 1 |
| 2002 | 8 | 10 |
| 2003 | 11 | 7 |
| 2004 | 6 | 11 |
| 2005 | 9 | 9 |
| 2006 | 12 | 12 |
| 2007 | 8 | 10 |
| 2008 | 4 | 3 |
| 2009 | 6 | 5 |
| 2010 | 6 | 8 |
| 2011 | 4 | 4 |
| 2012 | 6 | 6 |
| 2013 | 4 | 3 |
| 2014 | 5 | 4 |
| 2015 | 3 | 9 |
| 2016 | 2 | 5 |
| 2017 | 13 | 55 |
| 2018 | 10 | 4 |
| 2019 | 27 | 18 |
| 2020 | 20 | 37 |
| 2021 | 35 | 35 |
| 2022 | 35 | 24 |
| 2023 | 36 | 24 |
| 2024 | 25 | 19 |
| 2025 | 23 | 26 |
| 2026 | 13 | 26 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Simulation apparatus, simulation method, and non-transitory computer readable medium1 Sep 2026US 12,724,610 B2Renesas Electronics Corporation
- Adaptive cache memory buffer register architecture1 Sep 2026US 12,724,611 B2QUALCOMM Incorporated
- Differential matching prefetcher for coping with irregular memory access25 Aug 2026US 12,717,722 B2Xi' An Jiaotong University
- Analysis function imparting method, analysis function imparting device, and analysis function imparting program11 Aug 2026US 12,705,059 B2NTT, Inc.
- Measuring performance associated with processing instructions based on counters for different events14 Jul 2026US 12,681,730 B2SiFive, Inc.
- Method and system for analyzing a computer program1 Oct 2026US 2026/0299953 A1Siemens Industry Software Inc.
- Techniques to manage data sharing for a multi-core processor10 Sep 2026US 2026/0267646 A1Intel Corporation
- Apparatus with loopback control mechanism and methods for operating the same27 Aug 2026US 2026/0252521 A1Micron Technology, Inc.
- Synchronizing distributed dataflow programs using pairwise data-dependencies27 Aug 2026US 2026/0252526 A1SambaNova Systems, Inc.
- Phase-locked loops (pll), including time-to-digital converter (tdc) gain calibration circuits and related methods13 Aug 2026US 2026/0236374 A1Microsoft Technology Licensing, LLC
Most cited
By later US patents
- Register to memory data transfers with field extraction and zero/sign extension based upon size and mode data corresponding to employed address register277US 5,758,195 ATexas Instruments Incorporated · 1998
- Microprocessors194US 6,658,578 B1Texas Instruments Incorporated · 2003
- Synchronized MIMD multi-processing system and method inhibiting instruction fetch on memory access stall168US 5,809,288 ATexas Instruments Incorporated · 1998
- Instruction storage and cache miss recovery in a high speed multiprocessing parallel processing apparatus117US 5,179,680 ADigital Equipment Corporation · 1993
- Instruction storage method with a compressed format using a mask word109US 5,057,837 ADigital Equipment Corporation · 1991