G06F 9/32
Address formation of the next instruction
Official title: Address formation of the next instruction, e.g. by incrementing the instruction counter (G06F9/38 takes precedence)
G06F9/32 (Address formation of the next instruction) appears on 2,537 US grants and 2,194 published applications in this corpus.
Search patents in G06F- Granted patents
- 2,537
- Published applications
- 2,194
- Assignees
- 548
- Inventors
- 4,012
- Latest grant
- 29 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 7 | 0 |
| 1977 | 14 | 0 |
| 1978 | 7 | 0 |
| 1979 | 2 | 0 |
| 1980 | 6 | 0 |
| 1981 | 10 | 0 |
| 1982 | 7 | 0 |
| 1983 | 7 | 0 |
| 1984 | 10 | 0 |
| 1985 | 6 | 0 |
| 1986 | 3 | 0 |
| 1987 | 7 | 0 |
| 1988 | 6 | 0 |
| 1989 | 14 | 0 |
| 1990 | 7 | 0 |
| 1991 | 18 | 0 |
| 1992 | 12 | 0 |
| 1993 | 17 | 0 |
| 1994 | 20 | 0 |
| 1995 | 34 | 0 |
| 1996 | 44 | 0 |
| 1997 | 59 | 0 |
| 1998 | 89 | 0 |
| 1999 | 91 | 0 |
| 2000 | 61 | 0 |
| 2001 | 74 | 14 |
| 2002 | 57 | 75 |
| 2003 | 55 | 60 |
| 2004 | 49 | 95 |
| 2005 | 61 | 83 |
| 2006 | 67 | 62 |
| 2007 | 60 | 79 |
| 2008 | 54 | 99 |
| 2009 | 47 | 82 |
| 2010 | 58 | 60 |
| 2011 | 81 | 56 |
| 2012 | 46 | 52 |
| 2013 | 43 | 90 |
| 2014 | 54 | 84 |
| 2015 | 56 | 89 |
| 2016 | 117 | 71 |
| 2017 | 98 | 157 |
| 2018 | 84 | 77 |
| 2019 | 124 | 142 |
| 2020 | 129 | 146 |
| 2021 | 136 | 119 |
| 2022 | 126 | 78 |
| 2023 | 98 | 95 |
| 2024 | 90 | 76 |
| 2025 | 79 | 76 |
| 2026 | 36 | 77 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Methods and apparatus to sequence analog to digital conversions29 Sep 2026US 12,748,595 B2Texas Instruments Incorporated
- Array processor having an instruction sequencer including a program state controller and loop controllers29 Sep 2026US 12,748,596 B2Silicon Laboratories Inc.
- Selecting an executable operation from a lookup table identified by a conditional instruction and indexed based on combined results of concurrently-computed relational operators8 Sep 2026US 12,730,644 B2International Business Machines Corporation
- Method and apparatus for permuting streamed data elements8 Sep 2026US 12,730,758 B2Texas Instruments Incorporated
- Simulation apparatus, simulation method, and non-transitory computer readable medium1 Sep 2026US 12,724,610 B2Renesas Electronics Corporation
- Inserting null vectors into a stream of vectors8 Oct 2026US 2026/0310466 A1Texas Instruments Incorporated
- Method and system for analyzing a computer program1 Oct 2026US 2026/0299953 A1Siemens Industry Software Inc.
- Memory dependence prediction1 Oct 2026US 2026/0299958 A1Advanced Micro Devices, Inc.
- Techniques to manage data sharing for a multi-core processor10 Sep 2026US 2026/0267646 A1Intel Corporation
- Apparatus with loopback control mechanism and methods for operating the same27 Aug 2026US 2026/0252521 A1Micron Technology, Inc.
Most cited
By later US patents
- Register to memory data transfers with field extraction and zero/sign extension based upon size and mode data corresponding to employed address register277US 5,758,195 ATexas Instruments Incorporated · 1998
- Multiple thread multiple data predictive coded parallel processing system and method260US 6,079,008 APatton Electronics Co. · 2000
- Method for patching ROM instructions in an electronic embedded system including at least a further memory portion233US 7,424,570 B2Incard S.A. · 2008
- Method for pipeline processing of instructions by controlling access to a reorder buffer using a register file outside the reorder buffer215US 5,721,855 AIntel Corporation · 1998
- Microprocessors194US 6,658,578 B1Texas Instruments Incorporated · 2003