Methods and apparatus to sequence analog to digital conversions

An apparatus comprising:

• initialization circuitry configured to:
• enable a first step settings page and a second step settings page using a first enable bit and a second enable bit stored in memory;
• and
• disable a third step settings page using a third enable bit in the memory;
• sequencer circuitry configured to execute a sequence of operations, the sequence including:
• instruct ADC circuitry to perform, in a sequence, different numbers of conversions using different settings values, the settings values provided from the first step settings page and the second step settings page responsive to the first enable bit and the second enable bit;
• skip the third step settings page responsive to the third enable bit;
• and
• monitor circuitry configured to report, during the performance of the conversions and to an external device, one or more of:
• an index of the step settings page that corresponds to the settings values currently being used by the ADC circuitry;
• a number of conversions completed by the ADC circuitry using a current step settings page;
• or
• a number of iterations of the sequence completed by the ADC circuitry.

A non-transitory machine-readable storage medium comprising:

• a first step settings page storing first Analog to Digital Conversion (ADC) setting values;
• a second step settings page storing second ADC setting values;
• and
• a third step settings page storing third ADC setting values;
• and
• a general settings page storing:
• a first enable bit that enables the first settings page;
• a second enable bit that disables the second settings page;
• a third enable bit that enables the third settings page;
• wherein programmable circuitry coupled to the non-transitory machine-readable storage medium is configured to:
• instruct ADC circuitry to perform, in a sequence, different numbers of conversions using different settings values, the settings values provided from the first step settings page and the third step settings page responsive to the first enable bit and the third enable bit;
• skip the second step settings page responsive to the second enable bit;
• and
• report, during the performance of the conversions and to an external device, one or more of:
• an index of the step settings page that corresponds to the settings values currently being used by the ADC circuitry;
• a number of conversions completed by the ADC circuitry using a current step settings page;
• or
• a number of iterations of the sequence completed by the ADC circuitry.