Differential matching prefetcher for coping with irregular memory access

A differential matching prefetcher for coping with irregular memory access, comprising:

• an access index table, an access target table, a differential matching module, an index queue, an indirect memory access candidate scoreboard, an address generator, an indirect memory access relationship table, a prefetch status handling register, a repetition filter, a continuous address filter, and a range prefetch table;
• configured to monitor events of access requests and data responses between a computing core and a first level of cache, as well as between the first level of cache and a second level of cache;
• wherein the access index table, the access target table, the differential matching module, the index queue, and the indirect memory access candidate scoreboard are responsible for recognition of indirect memory access;
• the address generator, the indirect memory access relationship table, and the prefetch status handling register are responsible for generation and initiation of an actual prefetch behavior;
• and
• the repetition filter, the continuous address filter, and the range prefetch table are responsible for filtering a request address stream and a response data stream that are directly monitored.