Measuring performance associated with processing instructions based on counters for different events
AssigneeSiFive, Inc.
InventorDavid John Simpson
Life of this patent
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AssigneeSiFive, Inc.
InventorDavid John Simpson
Estimating the term…
A system may include a processor having a pipeline, a plurality of counters, and trigger circuitry. The plurality of counters may mount events associated with processing instructions in the pipeline. Counters of the plurality of counters may count different events. The trigger circuitry may trigger a performance measurement for a first instruction after counters of the plurality of counters meet predefined values. Triggering the performance measurement may cause the plurality of counters to reset and then count events associated with processing the first instruction. In some implementations, the trigger circuitry may trigger the performance measurement based on an AND selection and/or an OR selection of multiple counters of the plurality of counters meeting predefined values.
A method, comprising:
An apparatus, comprising:
A non-transitory computer readable medium comprising a circuit representation that, when processed by a computer, is used to program or manufacture an integrated circuit comprising:
Dependencies are inferred from the claim text.