G06F 9/30156
Special purpose encoding of instructions
Official title: {Special purpose encoding of instructions, e.g. Gray coding}
G06F9/30156 (Special purpose encoding of instructions) appears on 174 US grants and 163 published applications in this corpus.
Search patents in G06F- Granted patents
- 174
- Published applications
- 163
- Assignees
- 97
- Inventors
- 405
- Latest grant
- 16 Jun 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1983 | 1 | 0 |
| 1984 | 0 | 0 |
| 1985 | 0 | 0 |
| 1986 | 0 | 0 |
| 1987 | 0 | 0 |
| 1988 | 0 | 0 |
| 1989 | 0 | 0 |
| 1990 | 0 | 0 |
| 1991 | 0 | 0 |
| 1992 | 2 | 0 |
| 1993 | 0 | 0 |
| 1994 | 0 | 0 |
| 1995 | 0 | 0 |
| 1996 | 0 | 0 |
| 1997 | 0 | 0 |
| 1998 | 10 | 0 |
| 1999 | 7 | 0 |
| 2000 | 3 | 0 |
| 2001 | 7 | 2 |
| 2002 | 6 | 7 |
| 2003 | 5 | 8 |
| 2004 | 8 | 8 |
| 2005 | 1 | 9 |
| 2006 | 8 | 6 |
| 2007 | 5 | 7 |
| 2008 | 7 | 12 |
| 2009 | 5 | 5 |
| 2010 | 9 | 5 |
| 2011 | 5 | 4 |
| 2012 | 2 | 4 |
| 2013 | 2 | 6 |
| 2014 | 3 | 5 |
| 2015 | 5 | 5 |
| 2016 | 6 | 6 |
| 2017 | 5 | 12 |
| 2018 | 14 | 5 |
| 2019 | 11 | 9 |
| 2020 | 9 | 5 |
| 2021 | 8 | 9 |
| 2022 | 5 | 7 |
| 2023 | 3 | 3 |
| 2024 | 7 | 3 |
| 2025 | 2 | 3 |
| 2026 | 3 | 8 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Method and apparatus for supporting distributed graphics and compute engines and synchronization in multi-dielet parallel processor architectures—memory barriers16 Jun 2026US 12,657,023 B2NVIDIA Corporation
- System and method of checking integrity of an instruction decoder of a processing system28 Apr 2026US 12,613,768 B2NXP USA, Inc.
- Encoding and decoding variable length instructions24 Feb 2026US 12,561,139 B2Imagination Technologies Limited
- High performance constant cache and constant access mechanisms17 Jun 2025US 12,333,306 B2Intel Corporation
- Dynamic designation of instructions as sensitive for constraining instruction execution21 Jan 2025US 12,204,904 B2Marvell Asia Pte Ltd
- Encoding and Decoding Variable Length Instructions8 Oct 2026US 2026/0310465 A1Imagination Technologies Limited
- Method and apparatus for supporting distributed graphics and compute engines and synchronization in multi-dielet parallel processor architectures – memory barriers17 Sep 2026US 2026/0277607 A1NVIDIA Corporation
- Variable-length instruction set mode30 Jul 2026US 2026/0219888 A1Arm Limited
- Compact register specifiers for compact instruction encoding14 May 2026US 2026/0133801 A1Tuple Semiconductor, Inc.
- Task-related context for data transfers9 Apr 2026US 2026/0099357 A1Capital One Services, LLC
Most cited
By later US patents
- Automatic design of VLIW instruction formats76US 6,457,173 B1Hewlett-Packard Company · 2002
- Instruction compression and decompression system and method for a processor59US 5,819,058 AVM Labs, Inc. · 1998
- Security of program executables and microprocessors based on compiler-architecture interaction53US 7,996,671 B2BlueRISC, Inc. · 2011
- Microprocessor adapted for executing both a non-compressed fixed length instruction set and a compressed variable length instruction set51US 5,905,893 ALSI Logic Corporation · 1999
- Compressed Instruction format for use in a VLIW processor43US 5,826,054 APhilips Electronics North America Corporation · 1998