G06F 9/30116
Shadow registers
Official title: {Shadow registers, e.g. coupled registers, not forming part of the register space}
G06F9/30116 (Shadow registers) appears on 220 US grants and 172 published applications in this corpus.
Search patents in G06F- Granted patents
- 220
- Published applications
- 172
- Assignees
- 77
- Inventors
- 400
- Latest grant
- 11 Aug 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1990 | 1 | 0 |
| 1991 | 1 | 0 |
| 1992 | 0 | 0 |
| 1993 | 1 | 0 |
| 1994 | 1 | 0 |
| 1995 | 0 | 0 |
| 1996 | 10 | 0 |
| 1997 | 7 | 0 |
| 1998 | 16 | 0 |
| 1999 | 2 | 0 |
| 2000 | 17 | 0 |
| 2001 | 11 | 1 |
| 2002 | 5 | 9 |
| 2003 | 6 | 11 |
| 2004 | 4 | 13 |
| 2005 | 9 | 12 |
| 2006 | 9 | 3 |
| 2007 | 7 | 9 |
| 2008 | 3 | 5 |
| 2009 | 6 | 4 |
| 2010 | 10 | 4 |
| 2011 | 7 | 3 |
| 2012 | 2 | 7 |
| 2013 | 2 | 3 |
| 2014 | 1 | 5 |
| 2015 | 6 | 0 |
| 2016 | 1 | 4 |
| 2017 | 4 | 3 |
| 2018 | 5 | 9 |
| 2019 | 7 | 6 |
| 2020 | 6 | 8 |
| 2021 | 7 | 15 |
| 2022 | 13 | 15 |
| 2023 | 12 | 16 |
| 2024 | 10 | 1 |
| 2025 | 5 | 3 |
| 2026 | 6 | 3 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Computing system having an accumulator register having entries having a bit width larger than a main register file11 Aug 2026US 12,705,056 B2International Business Machines Corporation
- System and architecture neural network accelerator including filter circuit19 May 2026US 12,632,257 B2Optimum Semiconductor Technologies Inc.
- Programmable event testing19 May 2026US 12,632,262 B2Texas Instruments Incorporated
- Instruction set architecture support for a load global pointer instruction21 Apr 2026US 12,608,199 B2Intel Corporation
- Neural network accelerator for operating a consumer pipeline stage using a start flag set by a producer pipeline stage14 Apr 2026US 12,602,229 B2Optimum Semiconductor Technologies Inc.
- Anomaly Detection System for Hard Real-Time Embedded Systems10 Sep 2026US 2026/0267680 A1Rolls-Royce North American Technologies Inc.
- Shadow stack management with micro-operations18 Jun 2026US 2026/0169741 A1Akeana, Inc.
- Device, method and system for speculative execution of a dependent instruction18 Jun 2026US 2026/0169750 A1Intel Corporation
- Programmable gate array and method of generating configuration data for programming a gate array14 Aug 2025US 2025/0260405 A1dSPACE GmbH
- Software defined super cores3 Jul 2025US 2025/0217146 A1
Most cited
By later US patents
- High-performance, superscalar-based computer system with out-of-order instruction execution and concurrent results distribution164US 5,560,032 ASeiko Epson Corporation · 1996
- Multi-threaded cell for a memory146US 5,778,243 AInternational Business Machines Corporation · 1998
- Method and apparatus for selecting a register file in a data processing system105US 5,812,868 AMotorola, Inc. · 1998
- High-performance, superscalar-based computer system with out-of-order instruction execution94US 5,539,911 ASeiko Epson Corporation · 1996
- Context switching technique for processors with large register files92US 6,408,325 B1Sun Microsystems, Inc. · 2002