G06F 9/223
Execution means for microinstructions irrespective of the microinstruction function
Official title: {Execution means for microinstructions irrespective of the microinstruction function, e.g. decoding of microinstructions and nanoinstructions; timing of microinstructions; programmable logic arrays; delays and fan-out problems}
G06F9/223 (Execution means for microinstructions irrespective of the microinstruction function) appears on 232 US grants and 167 published applications in this corpus.
Search patents in G06F- Granted patents
- 232
- Published applications
- 167
- Assignees
- 102
- Inventors
- 507
- Latest grant
- 29 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 4 | 0 |
| 1977 | 4 | 0 |
| 1978 | 1 | 0 |
| 1979 | 5 | 0 |
| 1980 | 0 | 0 |
| 1981 | 2 | 0 |
| 1982 | 7 | 0 |
| 1983 | 5 | 0 |
| 1984 | 6 | 0 |
| 1985 | 8 | 0 |
| 1986 | 5 | 0 |
| 1987 | 6 | 0 |
| 1988 | 4 | 0 |
| 1989 | 8 | 0 |
| 1990 | 8 | 0 |
| 1991 | 6 | 0 |
| 1992 | 4 | 0 |
| 1993 | 5 | 0 |
| 1994 | 0 | 0 |
| 1995 | 3 | 0 |
| 1996 | 3 | 0 |
| 1997 | 3 | 0 |
| 1998 | 4 | 0 |
| 1999 | 1 | 0 |
| 2000 | 1 | 0 |
| 2001 | 2 | 3 |
| 2002 | 0 | 1 |
| 2003 | 3 | 1 |
| 2004 | 0 | 2 |
| 2005 | 1 | 1 |
| 2006 | 2 | 0 |
| 2007 | 2 | 3 |
| 2008 | 1 | 1 |
| 2009 | 2 | 3 |
| 2010 | 2 | 2 |
| 2011 | 1 | 0 |
| 2012 | 1 | 2 |
| 2013 | 0 | 1 |
| 2014 | 1 | 1 |
| 2015 | 2 | 1 |
| 2016 | 1 | 0 |
| 2017 | 3 | 7 |
| 2018 | 3 | 5 |
| 2019 | 9 | 26 |
| 2020 | 14 | 22 |
| 2021 | 15 | 14 |
| 2022 | 14 | 23 |
| 2023 | 16 | 16 |
| 2024 | 15 | 3 |
| 2025 | 11 | 7 |
| 2026 | 8 | 22 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Micro-controller chip containing multi-protocol communication interface peripheral and operation method thereof29 Sep 2026US 12,748,711 B2Nanjing Qinheng Microelectronics Co., Ltd.
- Method and processor for executing target instructions28 Jul 2026US 12,693,865 B2Shanghai Zhaoxin Semiconductor Co., Ltd.
- Unified memory for integrated circuit executing neural network7 Jul 2026US 12,675,678 B1Amazon Technologies, Inc.
- Real-time validation of microcode updates12 May 2026US 12,625,702 B2International Business Machines Corporation
- Management of a multi-layer model platform5 May 2026US 12,619,400 B2Capital One Services, LLC
- Management of a multi-layer model platform3 Sep 2026US 2026/0259710 A1Capital One Services, LLC
- Apparatus And Method For Memory Alias Disambiguation Training11 Jun 2026US 2026/0161392 A1Intel Corporation
- Autopredication of Tail-Nested Region and Loop Many-Trip Count Region11 Jun 2026US 2026/0161393 A1
- Apparatus and Method for Managing Denormal Values in a Processor11 Jun 2026US 2026/0161404 A1
- Decoupled ordered micro sequencer11 Jun 2026US 2026/0161405 A1Intel Corporation
Most cited
By later US patents
- Programmable logic array and data processing unit using the same110US 5,511,173 ARicoh Company, Ltd. · 1996
- Methods for partitioning mainframe instruction sets to implement microprocessor based emulation thereof71US 4,514,803 AInternational Business Machines Corporation · 1985
- Flexible processor on a single semiconductor substrate using a plurality of arrays61US 4,354,228 AInternational Business Machines Corporation · 1982
- Psuedo-microprogramming in microprocessor in single-chip microprocessor with alternate IR loading from internal or external program memories61US 4,450,519 ATexas Instruments Incorporated · 1984
- Event counter61US 6,542,985 B1Unisys Corporation · 2003