Event counter
AssigneeUnisys Corporation
InventorsDavid C. Johnson, Douglas A. Fuller
Life of this patent
Estimating the term…
Abstract
A data processor is disclosed that executes a number of microcode instruction words. Each of the microcode instruction words has a bit field reserved to indicate which, if any, event counters are to be incremented. This enables the number of executions of a particular microcode instruction word to be counted. By simply changing the microcode bits in the bit fields of the microcode instruction words, the event counter can be programmed to count any number or pattern of microcode instruction word executions. In one embodiment, there is a one-to-one correspondence between each bit in the bit field and each event counter. In another system, the bits in the bit field are decoded to provide an address that selects selected event counters.
Claims22
In a microcode instruction processor having a microcode instruction register for storing a microcode instruction, the microcode instruction coupled to a control unit, for counting the number of times the microcode instruction of said selected microcode instructions are executed in a computer, wherein the improvement comprises:
- means for indicating whether to count execution of the microcode instruction of all said selected microcode instructions;
- means for counting execution of the microcode instruction when said indicating means indicates that the microcode instruction is to be counted;
- and
- means for incrementing a counter each time a microcode instruction is executed that has a one bit field that indicates the corresponding microcode instruction should be counted.
A system for counting the execution of selected microinstructions in a computer comprising:
- an addressable memory device storing microcode instruction words having an event counter bit field with more than one bit for designating an event counter selection;
- a microcode instruction word register for receiving an addressed microcode instruction word from said addressable memory device;
- a decoder for decoding a portion of said microcode instruction word register corresponding to said event counter bit field and for outputting an event counter selection;
- and
- a plurality of event counters operably coupled to said decode, each of the plurality of event counters incrementing when selected by said event counter selection.
A method for counting the number of times selected microcode instruction words are executed in a computer, the method comprising the steps of:
- providing an instruction processor including:
- at least one event counter for counting events, each of the at least one event counters having an input for incrementing said event counter and an output for reading said event counter contents;
- and
- a microcode instruction storage means for storing a number of microcode instructions, the microcode storage means having at least one bit field for each microcode instruction that indicates which if any of said at least one event counters are to be incremented when the corresponding microcode instruction is executed, said microcode instruction storage means being operably coupled to the inputs of said event counters;
- setting bits in said microcode instruction storage means bit fields for those microcode instructions for which counting is desired;
- executing selected microcode instructions;
- sequentially providing the at least one bit field that corresponds to each executed microcode instruction the inputs of said event counters, causing those event counters that correspond to the set bits in the at least one bit field to increment;
- and
- reading out said event counter contents from said event counters.
A method for counting the number of times selected microcode instructions are executed in a computer, the method comprising the steps of:
- providing a bit field for each microcode instruction, wherein the bit field identifies whether the corresponding microcode instruction should be counted;
- executing selected microcode instructions on the computer;
- and
- incrementing a counter each time a microcode instruction is executed that has a one bit field that indicates the corresponding microcode instruction should be counted.
Dependencies are inferred from the claim text.