Apparatus and Method for Managing Denormal Values in a Processor
OwnerJonathan HALL, Brian HICKMANN +3inventors
InventorsJonathan HALL, Brian HICKMANN, Henry WONG, Timothy ELLIOTT, Patrick LOWRY
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OwnerJonathan HALL, Brian HICKMANN +3inventors
InventorsJonathan HALL, Brian HICKMANN, Henry WONG, Timothy ELLIOTT, Patrick LOWRY
Estimating the term…
An apparatus and method for efficiently processing denormals on a processor. For example, one embodiment of a processor comprises: a decoder to decode instructions of a program code sequence into mircooperations (uops); a control register to store one or more bits related to denormal processing; uop morphing circuitry to generate or select a first type of FP divide or square root uop when the one or more bits indicate no possibility of denormals and to generate or select a second type of FP divide or square root uop when the one or more bits indicate a possibility of denormals; and execution circuitry to execute the first type of FP divide or square root uop to generate a result or to execute the second type of FP divide or square root uop, handling any denormals in hardware, to generate the result.
A processor, comprising:
A processor, comprising:
A method, comprising:
A machine-readable medium having program code stored thereon which, when executed by a machine, causes the machine to perform additional operations, comprising:
Dependencies are inferred from the claim text.