Micro-controller chip containing multi-protocol communication interface peripheral and operation method thereof
AssigneeNanjing Qinheng Microelectronics Co., Ltd.
InventorChunhua Wang
Life of this patent
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AssigneeNanjing Qinheng Microelectronics Co., Ltd.
InventorChunhua Wang
Estimating the term…
Disclosed are a micro-controller chip containing a multi-protocol communication interface peripheral and an operation method thereof. The micro-controller chip comprises a multi-protocol communication interface peripheral, the multi-protocol communication interface peripheral is connected to a system bus, the multi-protocol communication interface peripheral is connected with an I/O port, the multi-protocol communication interface peripheral comprises an exclusively used RISC instruction set micro-kernel, a code memory and a code program stored on the code memory and executable by the RISC instruction set micro-kernel, the code program at least comprises two bit operation instructions of 1 setting and 0 clearing, the instructions are single-cycle instructions, and when the RISC instruction set micro-kernel executes the code program, the I/O port outputs 1 or 0.
A micro-controller chip containing a multi-protocol communication interface peripheral, comprising a main processor kernel, a system bus, a plurality of on-chip peripherals and an I/O port, wherein at least one of the plurality of on-chip peripherals further comprises the multi-protocol communication interface peripheral, the multi-protocol communication interface peripheral is located in an interior of the micro-controller chip, the multi-protocol communication interface peripheral is connected to the system bus, the multi-protocol communication interface peripheral is connected with the I/O port, the multi-protocol communication interface peripheral comprises a RISC instruction set micro-kernel, a code memory and a code program stored on the code memory and executable by the RISC instruction set micro-kernel, the code program at least comprises two bit operation instructions of 1 setting and 0 clearing, the instructions are single-cycle instructions, when the RISC instruction set micro-kernel executes the code program, the I/O port outputs 1 or 0, and the RISC instruction set micro-kernel is exclusively used for controlling output and input of the I/O port.
Dependencies are inferred from the claim text.