G06F 7/5312
Using carry save adders
Official title: {using carry save adders}
G06F7/5312 (Using carry save adders) appears on 74 US grants and 26 published applications in this corpus.
Search patents in G06F- Granted patents
- 74
- Published applications
- 26
- Assignees
- 51
- Inventors
- 118
- Latest grant
- 3 Jun 2025
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1978 | 1 | 0 |
| 1979 | 1 | 0 |
| 1980 | 2 | 0 |
| 1981 | 0 | 0 |
| 1982 | 0 | 0 |
| 1983 | 1 | 0 |
| 1984 | 3 | 0 |
| 1985 | 1 | 0 |
| 1986 | 2 | 0 |
| 1987 | 1 | 0 |
| 1988 | 5 | 0 |
| 1989 | 3 | 0 |
| 1990 | 2 | 0 |
| 1991 | 7 | 0 |
| 1992 | 2 | 0 |
| 1993 | 2 | 0 |
| 1994 | 1 | 0 |
| 1995 | 4 | 0 |
| 1996 | 0 | 0 |
| 1997 | 2 | 0 |
| 1998 | 3 | 0 |
| 1999 | 5 | 0 |
| 2000 | 2 | 0 |
| 2001 | 1 | 0 |
| 2002 | 0 | 0 |
| 2003 | 1 | 2 |
| 2004 | 0 | 1 |
| 2005 | 0 | 0 |
| 2006 | 1 | 2 |
| 2007 | 1 | 0 |
| 2008 | 0 | 2 |
| 2009 | 1 | 1 |
| 2010 | 1 | 0 |
| 2011 | 0 | 0 |
| 2012 | 0 | 0 |
| 2013 | 0 | 1 |
| 2014 | 0 | 3 |
| 2015 | 1 | 0 |
| 2016 | 2 | 2 |
| 2017 | 2 | 0 |
| 2018 | 2 | 0 |
| 2019 | 0 | 4 |
| 2020 | 2 | 3 |
| 2021 | 5 | 0 |
| 2022 | 1 | 2 |
| 2023 | 1 | 2 |
| 2024 | 0 | 1 |
| 2025 | 2 | 0 |
By publication year. Applications have been published since 2001.
Recent patents
- Compressed wallace trees in FMA circuits3 Jun 2025US 12,321,714 B2Intel Corporation
- Multiplier and adder in systolic array14 Jan 2025US 12,197,890 B2Google Inc.
- Controlling carry-save adders in multiplication17 Oct 2023US 11,789,701 B2Arm Limited
- Method and apparatus for performing field programmable gate array packing with continuous carry chains4 Jan 2022US 11,216,249 B2Intel Corporation
- Programmable-logic-directed multiplier mapping2 Nov 2021US 11,163,530 B2Intel Corporation
- Methods and electronic device for high performance modulo multiplication31 Oct 2024US 2024/0361984 A1Samsung Electronics Co., Ltd.
- Digital in-memory computing macro based on approximate arithmetic hardware24 Aug 2023US 2023/0266943 A1The Trustees of Columbia University in the City of New York
- Multiplier and Adder in Systolic Array19 Jan 2023US 2023/0015148 A1Google Inc.
- Compressed wallace trees in fma circuits17 Nov 2022US 2022/0365751 A1Intel Corporation
- Controlling carry-save adders in multiplication10 Feb 2022US 2022/0043631 A1Arm Limited
Most cited
By later US patents
- Floating point data processor for high speech operation120US 4,075,704 AFloating Point Systems, Inc. · 1978
- Multiplier-accumulator circuit using latched sums and carries69US 4,736,335 AZoran Corporation · 1988
- Accessing arrangement for interleaved modular memories47US 4,189,767 ABell Telephone Laboratories, Incorporated · 1980
- Low power array multiplier42US 7,546,331 B2QUALCOMM Incorporated · 2009
- System and method for dynamically reducing power consumption of floating-point logic39US 9,268,528 B2NVIDIA Corporation · 2016