G06F 30/33
Design verification
Official title: Design verification, e.g. functional simulation or model checking
G06F30/33 (Design verification) appears on 7,816 US grants and 6,404 published applications in this corpus.
Search patents in G06F- Granted patents
- 7,816
- Published applications
- 6,404
- Assignees
- 1,280
- Inventors
- 12,877
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1981 | 2 | 0 |
| 1982 | 1 | 0 |
| 1983 | 0 | 0 |
| 1984 | 1 | 0 |
| 1985 | 3 | 0 |
| 1986 | 6 | 0 |
| 1987 | 9 | 0 |
| 1988 | 15 | 0 |
| 1989 | 12 | 0 |
| 1990 | 20 | 0 |
| 1991 | 15 | 0 |
| 1992 | 17 | 0 |
| 1993 | 23 | 0 |
| 1994 | 24 | 0 |
| 1995 | 57 | 0 |
| 1996 | 72 | 0 |
| 1997 | 99 | 0 |
| 1998 | 136 | 0 |
| 1999 | 131 | 0 |
| 2000 | 118 | 0 |
| 2001 | 141 | 26 |
| 2002 | 156 | 164 |
| 2003 | 207 | 289 |
| 2004 | 181 | 255 |
| 2005 | 171 | 280 |
| 2006 | 281 | 292 |
| 2007 | 270 | 292 |
| 2008 | 293 | 364 |
| 2009 | 253 | 294 |
| 2010 | 282 | 217 |
| 2011 | 313 | 196 |
| 2012 | 327 | 252 |
| 2013 | 386 | 252 |
| 2014 | 374 | 238 |
| 2015 | 257 | 242 |
| 2016 | 296 | 233 |
| 2017 | 298 | 278 |
| 2018 | 236 | 283 |
| 2019 | 422 | 263 |
| 2020 | 438 | 271 |
| 2021 | 360 | 256 |
| 2022 | 281 | 293 |
| 2023 | 287 | 279 |
| 2024 | 183 | 251 |
| 2025 | 207 | 185 |
| 2026 | 155 | 159 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Compiling a tensor tiling specification to multi-dimensional data mover circuit configurations6 Oct 2026US 12,755,077 B2Xilinx, Inc.
- Method and system for automatically checking circuit layout of printed circuit board6 Oct 2026US 12,755,082 B2Usi Electronics (Shenzhen) Co., Ltd.
- Implementing functions in hardware29 Sep 2026US 12,748,698 B2Imagination Technologies Limited
- Scalable generative AI-based tool infrastructure29 Sep 2026US 12,748,791 B2Microsoft Technology Licensing, LLC
- Adaptable framework for circuit design simulation verification29 Sep 2026US 12,748,903 B2Xilinx, Inc.
- Method and system for exploring complex mega cells in integrated circuit8 Oct 2026US 2026/0310866 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Collaborative debugging across firmware and hardware8 Oct 2026US 2026/0310868 A1International Business Machines Corporation
- Ai agent-based analysis of debugging reports for circuit design systems and applications8 Oct 2026US 2026/0310869 A1NVIDIA Corporation
- Processor controlled programmable logic device modification1 Oct 2026US 2026/0299908 A1Altera Corporation
- Scalable and dynamic multi-modal chip design hotspot classification24 Sep 2026US 2026/0289057 A1APPLIED Materials.Inc.
Most cited
By later US patents
- Multiprocessor for hardware emulation483US 5,551,013 AInternational Business Machines Corporation · 1996
- Method of verifying integrated circuit operation by comparing stored data structures corresponding to integrated circuit logic cells379US 5,852,445 AFujitsu Limited · 1998
- Method and system for creating and validating low level description of electronic design from higher level, behavior-oriented description, including interactive system for hierarchical display of control and dataflow information324US 5,801,958 ALSI Logic Corporation · 1998
- Method of using electronically reconfigurable logic circuits320US 5,036,473 AMentor Graphics Corporation · 1991
- Method of removing gated clocks from the clock nets of a netlist for timing sensitive implementation of the netlist in a hardware emulation system311US 5,452,239 AQuickturn Design Systems, Inc. · 1995