G06F 2207/3868
Bypass control, i.e. possibility to transfer an operand unchanged to the output
G06F2207/3868 (Bypass control, i.e. possibility to transfer an operand unchanged to the output) appears on 37 US grants and 25 published applications in this corpus.
Search patents in G06F- Granted patents
- 37
- Published applications
- 25
- Assignees
- 26
- Inventors
- 57
- Latest grant
- 25 Feb 2020
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 1 | 0 |
| 1977 | 0 | 0 |
| 1978 | 0 | 0 |
| 1979 | 0 | 0 |
| 1980 | 0 | 0 |
| 1981 | 1 | 0 |
| 1982 | 0 | 0 |
| 1983 | 0 | 0 |
| 1984 | 0 | 0 |
| 1985 | 1 | 0 |
| 1986 | 0 | 0 |
| 1987 | 1 | 0 |
| 1988 | 0 | 0 |
| 1989 | 4 | 0 |
| 1990 | 1 | 0 |
| 1991 | 0 | 0 |
| 1992 | 2 | 0 |
| 1993 | 1 | 0 |
| 1994 | 0 | 0 |
| 1995 | 0 | 0 |
| 1996 | 1 | 0 |
| 1997 | 0 | 0 |
| 1998 | 0 | 0 |
| 1999 | 0 | 0 |
| 2000 | 0 | 0 |
| 2001 | 1 | 0 |
| 2002 | 1 | 1 |
| 2003 | 0 | 1 |
| 2004 | 0 | 3 |
| 2005 | 3 | 0 |
| 2006 | 2 | 1 |
| 2007 | 0 | 5 |
| 2008 | 0 | 1 |
| 2009 | 2 | 1 |
| 2010 | 4 | 0 |
| 2011 | 2 | 3 |
| 2012 | 2 | 0 |
| 2013 | 0 | 1 |
| 2014 | 1 | 0 |
| 2015 | 0 | 1 |
| 2016 | 1 | 1 |
| 2017 | 1 | 4 |
| 2018 | 2 | 1 |
| 2019 | 1 | 0 |
| 2020 | 1 | 0 |
| 2021 | 0 | 0 |
| 2022 | 0 | 0 |
| 2023 | 0 | 0 |
| 2024 | 0 | 0 |
| 2025 | 0 | 0 |
| 2026 | 0 | 1 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Methods and apparatus for sequencing multiply-accumulate operations25 Feb 2020US 10,572,224 B2Altera Corporation
- Pipelined cascaded digital signal processing structures and methods17 Sep 2019US 10,417,004 B2Altera Corporation
- Data processing method, processor, and data processing device17 Jul 2018US 10,025,752 B2Huawei Technologies Co., Ltd.
- Methods and apparatus for sequencing multiply-accumulate operations10 Jul 2018US 10,019,234 B2Altera Corporation
- Pipelined cascaded digital signal processing structures and methods29 Aug 2017US 9,747,110 B2Altera Corporation
- Sparsity-aware compute-in-memory architecture with selective computation bypass20 Aug 2026US 2026/0244403 A1OpenAI OpCo, LLC
- Methods and apparatus for sequencing multiply-accumulate operations6 Dec 2018US 2018/0349098 A1Intel Corporation
- Pipelined cascaded digital signal processing structures and methods9 Nov 2017US 2017/0322813 A1Altera Corporation
- Pipelined cascaded digital signal processing structures and methods19 Oct 2017US 2017/0300337 A1Altera Corporation
- Methods and apparatus for sequencing multiply-accumulate operations6 Apr 2017US 2017/0097810 A1Altera Corporation
Most cited
By later US patents
- Fixed-point multiplier-accumulator architecture92US 4,876,660 ABipolar Integrated Technology, Inc. · 1989
- Logarithmic arithmetic logic unit87US 4,682,302 AMotorola, Inc. · 1987
- Pipeline information processing circuit for floating point operations64US 5,590,365 AKabushiki Kaisha Toshiba · 1996
- Low power array multiplier42US 7,546,331 B2QUALCOMM Incorporated · 2009
- High-speed digital multiplier architecture26US 4,841,468 ABipolar Integrated Technology, Inc. · 1989