G06F 2115/02
System on chip [soc] design
Official title: System on chip [SoC] design
G06F2115/02 (System on chip [soc] design) appears on 262 US grants and 318 published applications in this corpus.
Search patents in G06F- Granted patents
- 262
- Published applications
- 318
- Assignees
- 114
- Inventors
- 746
- Latest grant
- 28 Jul 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1999 | 1 | 0 |
| 2000 | 0 | 0 |
| 2001 | 0 | 0 |
| 2002 | 0 | 2 |
| 2003 | 0 | 2 |
| 2004 | 1 | 3 |
| 2005 | 3 | 2 |
| 2006 | 2 | 1 |
| 2007 | 1 | 3 |
| 2008 | 1 | 4 |
| 2009 | 4 | 2 |
| 2010 | 0 | 1 |
| 2011 | 3 | 1 |
| 2012 | 3 | 1 |
| 2013 | 5 | 3 |
| 2014 | 5 | 6 |
| 2015 | 8 | 13 |
| 2016 | 11 | 15 |
| 2017 | 30 | 23 |
| 2018 | 9 | 27 |
| 2019 | 25 | 22 |
| 2020 | 30 | 17 |
| 2021 | 26 | 24 |
| 2022 | 16 | 31 |
| 2023 | 27 | 27 |
| 2024 | 19 | 33 |
| 2025 | 22 | 26 |
| 2026 | 10 | 29 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Use of AI image generation model to create high-level visualization of a network-on-chip28 Jul 2026US 12,694,192 B1Arteris, Inc.
- System and method for generation of networks-on-chip (NoCs)16 Jun 2026US 12,657,155 B2Arteris, Inc.
- Signal and power integrated analog analysis system and method for full chip system5 May 2026US 12,619,811 B2J.W.Microelectronics Technology Co., Ltd
- Systems and methods for reducing congestion on network-on-chip14 Apr 2026US 12,602,529 B2Altera Corporation
- Development support apparatus, development support method, and state detection method7 Apr 2026US 12,596,853 B2GS Yuasa International Ltd.
- Method of matching multiple chips for forming a system-on-integrated-chips1 Oct 2026US 2026/0300589 A1Mediatek Inc.
- System and method for recreating silicon behavior of system on chip27 Aug 2026US 2026/0252773 A1Samsung Electronics Co., Ltd.
- Optimized coordinate-based routing in heterogeneous network on chip topologies27 Aug 2026US 2026/0252781 A1Baya Systems, Inc.
- System-on-chip device30 Jul 2026US 2026/0219723 A1Itda Semiconductor Co., Ltd.
- Channel-less distributed design-for-test architecture23 Jul 2026US 2026/0212099 A1QUALCOMM Incorporated
Most cited
By later US patents
- System-on-chip layout compilation106US 5,883,814 AInternational Business Machines Corporation · 1999
- System and method for designing system on chip (SoC) circuits through artificial intelligence and reinforcement learning88US 9,792,397 B1Alphaics Corporation · 2017
- System and method for simulating an aspect of a memory circuit72US 8,090,897 B2Google Inc. · 2012
- Method and system for integrating cores in FPGA-based system-on-chip (SoC)71US 6,941,538 B2Xilinx, Inc. · 2005
- XML-based system and method for collaborative web-based design and verification of system-on-a-chip70US 6,968,346 B2International Business Machines Corporation · 2005