G06F 13/1678
Using bus width
Official title: {using bus width}
G06F13/1678 (Using bus width) appears on 436 US grants and 439 published applications in this corpus.
Search patents in G06F- Granted patents
- 436
- Published applications
- 439
- Assignees
- 118
- Inventors
- 644
- Latest grant
- 1 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1981 | 1 | 0 |
| 1982 | 4 | 0 |
| 1983 | 1 | 0 |
| 1984 | 0 | 0 |
| 1985 | 0 | 0 |
| 1986 | 1 | 0 |
| 1987 | 0 | 0 |
| 1988 | 0 | 0 |
| 1989 | 1 | 0 |
| 1990 | 1 | 0 |
| 1991 | 0 | 0 |
| 1992 | 0 | 0 |
| 1993 | 2 | 0 |
| 1994 | 5 | 0 |
| 1995 | 2 | 0 |
| 1996 | 3 | 0 |
| 1997 | 5 | 0 |
| 1998 | 6 | 0 |
| 1999 | 5 | 0 |
| 2000 | 14 | 0 |
| 2001 | 8 | 4 |
| 2002 | 6 | 14 |
| 2003 | 9 | 3 |
| 2004 | 12 | 3 |
| 2005 | 5 | 16 |
| 2006 | 6 | 10 |
| 2007 | 5 | 5 |
| 2008 | 7 | 8 |
| 2009 | 6 | 7 |
| 2010 | 5 | 8 |
| 2011 | 9 | 10 |
| 2012 | 7 | 6 |
| 2013 | 9 | 8 |
| 2014 | 10 | 24 |
| 2015 | 7 | 20 |
| 2016 | 20 | 26 |
| 2017 | 21 | 31 |
| 2018 | 29 | 34 |
| 2019 | 40 | 24 |
| 2020 | 35 | 32 |
| 2021 | 25 | 27 |
| 2022 | 25 | 24 |
| 2023 | 21 | 17 |
| 2024 | 16 | 29 |
| 2025 | 29 | 24 |
| 2026 | 13 | 25 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Local internal discovery and configuration of individually selected and jointly selected devices1 Sep 2026US 12,724,729 B2Rambus Inc.
- Memory system and memory chip25 Aug 2026US 12,717,732 B2Etron Technology, Inc.
- Systems and methods for load balancing memory traffic25 Aug 2026US 12,717,733 B2Altera Corporation
- Bandwidth management of a serial interface11 Aug 2026US 12,705,192 B2Apple Inc.
- Systems and methods for high bandwidth memory with unidirectional data flow11 Aug 2026US 12,705,202 B2Google Inc.
- Memory bandwidth reduction for power savings24 Sep 2026US 2026/0288222 A1Apple Inc.
- Memory system and memory chip24 Sep 2026US 2026/0288658 A1Etron Technology, Inc.
- Disk device, controller, and control method24 Sep 2026US 2026/0288668 A1Kabushiki Kaisha Toshiba
- Memory system and information processing system27 Aug 2026US 2026/0252249 A1Kioxia Corporation
- Multi-channel dynamic random access memory (dram) latency optimization with data interface multiplexing27 Aug 2026US 2026/0252509 A1Rambus Inc.
Most cited
By later US patents
- Apparatus for synchronously generating clock signals in a data processing system430US 5,243,703 ARambus Inc. · 1993
- Integrated circuit I/O using high performance bus interface325US 5,319,755 ARambus Inc. · 1994
- Memory circuitry having bus interface for receiving information in packets and access time registers282US 5,606,717 ARambus Inc. · 1997
- Memory module having memory devices containing internal device ID registers and method of initializing same261US 5,928,343 ARambus Inc. · 1999
- Memory device supporting a dynamically configurable core organization220US 6,889,304 B2Rambus Inc. · 2005