G06F 12/0215
With look ahead addressing means
Official title: {with look ahead addressing means}
G06F12/0215 (With look ahead addressing means) appears on 786 US grants and 593 published applications in this corpus.
Search patents in G06F- Granted patents
- 786
- Published applications
- 593
- Assignees
- 196
- Inventors
- 1,141
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 1 | 0 |
| 1977 | 0 | 0 |
| 1978 | 0 | 0 |
| 1979 | 2 | 0 |
| 1980 | 0 | 0 |
| 1981 | 2 | 0 |
| 1982 | 0 | 0 |
| 1983 | 2 | 0 |
| 1984 | 3 | 0 |
| 1985 | 0 | 0 |
| 1986 | 5 | 0 |
| 1987 | 0 | 0 |
| 1988 | 0 | 0 |
| 1989 | 7 | 0 |
| 1990 | 4 | 0 |
| 1991 | 3 | 0 |
| 1992 | 4 | 0 |
| 1993 | 5 | 0 |
| 1994 | 15 | 0 |
| 1995 | 17 | 0 |
| 1996 | 20 | 0 |
| 1997 | 22 | 0 |
| 1998 | 22 | 0 |
| 1999 | 31 | 0 |
| 2000 | 29 | 0 |
| 2001 | 32 | 9 |
| 2002 | 28 | 27 |
| 2003 | 30 | 23 |
| 2004 | 28 | 24 |
| 2005 | 20 | 26 |
| 2006 | 19 | 20 |
| 2007 | 19 | 8 |
| 2008 | 14 | 12 |
| 2009 | 12 | 14 |
| 2010 | 6 | 13 |
| 2011 | 13 | 10 |
| 2012 | 9 | 8 |
| 2013 | 9 | 14 |
| 2014 | 12 | 17 |
| 2015 | 24 | 19 |
| 2016 | 23 | 16 |
| 2017 | 21 | 17 |
| 2018 | 15 | 32 |
| 2019 | 33 | 39 |
| 2020 | 21 | 44 |
| 2021 | 39 | 26 |
| 2022 | 26 | 40 |
| 2023 | 31 | 31 |
| 2024 | 50 | 45 |
| 2025 | 37 | 43 |
| 2026 | 21 | 16 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Cache structure and utilization6 Oct 2026US 12,754,876 B2Intel Corporation
- Systems and methods for updating memory side caches in a multi-GPU configuration15 Sep 2026US 12,737,317 B2Intel Corporation
- Cache structure and utilization15 Sep 2026US 12,737,318 B2Intel Corporation
- Wordline group-based identification of good memory blocks during a programming operation18 Aug 2026US 12,711,055 B2Micron Technology, Inc.
- Method for copying data within memory device, memory device, and electronic device thereof18 Aug 2026US 12,711,068 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Methods and apparatus for eviction in dual datapath victim cache system1 Oct 2026US 2026/0300187 A1
- Computer-readable recording medium having stored therein information processing program, information processing apparatus, and information processing method17 Sep 2026US 2026/0277785 A1Fujitsu Limited
- Methods and apparatus to facilitate read-modify-write support in a victim cache17 Sep 2026US 2026/0277825 A1
- Caching lookup tables for block family error avoidance6 Aug 2026US 2026/0228069 A1Micron Technology, Inc.
- Sense amplifiers as static random access memory cache30 Jul 2026US 2026/0220044 A1Micron Technology, Inc.
Most cited
By later US patents
- Apparatus for synchronously generating clock signals in a data processing system430US 5,243,703 ARambus Inc. · 1993
- Integrated circuit I/O using high performance bus interface325US 5,319,755 ARambus Inc. · 1994
- Memory circuitry having bus interface for receiving information in packets and access time registers282US 5,606,717 ARambus Inc. · 1997
- Memory module having memory devices containing internal device ID registers and method of initializing same261US 5,928,343 ARambus Inc. · 1999
- Memory module with a circuit providing load isolation and memory domain translation220US 7,532,537 B2Netlist, Inc. · 2009