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US 7,532,537 B2Granted
Memory module with a circuit providing load isolation and memory domain translation
AssigneeNetlist, Inc.
InventorsJeffrey C. Solomon, Jayesh R. Bhakta
Life of this patent
Estimating the term…
Abstract
A memory module includes a plurality of memory devices and a circuit. Each memory device has a corresponding load. The circuit is electrically coupled to the plurality of memory devices and is configured to be electrically coupled to a memory controller of a computer system. The circuit selectively isolates one or more of the loads of the memory devices from the computer system. The circuit comprises logic which translates between a system memory domain of the computer system and a physical memory domain of the memory module.
Claims44
A memory module comprising:
- a plurality of memory devices, each memory device having a corresponding load;
- and
- a circuit electrically coupled to the plurality of memory devices and configured to be electrically coupled to a memory controller of a computer system, the circuit selectively isolating one or more of the loads of the memory devices from the computer system, the circuit comprising logic which translates between a system memory domain of the computer system and a physical memory domain of the memory module, wherein the system memory domain is compatible with a first number of chip selects, and the physical memory domain is compatible with a second number of chip selects equal to twice the first number of chip selects.
A method of using a memory module with a computer system, the method comprising:
- providing a memory module having a plurality of memory devices and a circuit electrically coupled to the plurality of memory devices, the circuit configured to be electrically coupled to a computer system, each memory device having a corresponding load;
- electrically coupling the memory module to the computer system;
- and
- activating the circuit to selectively isolate at least one of the loads of the memory devices from the computer system and to translate between a system memory domain of the computer system and a physical memory domain of the memory module, wherein the system memory domain is compatible with a first number of chip selects, and the physical memory domain is compatible with a second number of chip selects equal to twice the first number of chip selects.
1 more element
A memory module connectable to a computer system, the memory module comprising:
- a first memory device having a first data signal line and a first data strobe signal line;
- a second memory device having a second data signal line and a second data strobe signal line;
- a common data signal line connectable to the computer system;
- and
- a device electrically coupled to the first data signal line, to the second data signal line, and to the common data signal line, the device selectively electrically coupling the first data signal line to the common data signal line and selectively electrically coupling the second data signal line to the common data signal line, the device comprising logic which translates between a system memory domain of the computer system and a physical memory domain of the memory module, wherein the system memory domain is compatible with a first number of chip selects, and the physical memory domain is compatible with a second number of chip selects equal to twice the first, number of chip selects.
2 more elements
A memory module comprising:
- a plurality of memory devices arranged in one or more ranks, each memory device having a corresponding load;
- and
- a circuit electrically coupled to the plurality of memory devices and configured to be electrically coupled to a memory controller of a computer system, the circuit selectively isolating one or more of the loads of the memory devices from the computer system, the circuit comprising logic which translates between a system memory domain of the computer system and a physical memory domain of the memory module, wherein the system memory domain is compatible to a first memory density per rank, and the physical memory domain is compatible with a second memory density per rank equal to twice the first memory density per rank.
A method of using a memory module with a computer system, the method comprising:
- providing a memory module having a plurality of memory devices arranged in one or more ranks and a circuit electrically coupled to the plurality of memory devices, the circuit configured to be electrically coupled to a computer system, each memory device having a corresponding load;
- electrically coupling the memory module to the computer system;
- and
- activating the circuit to selectively isolate at least one of the loads of the memory devices from the computer system and to translate between a system memory domain of the computer system and a physical memory domain of the memory module, wherein the system memory domain is compatible to a first memory density per rank, and the physical memory domain is compatible with a second memory density per rank equal to twice the first memory density per rank.
1 more element
A memory module connectable to a computer system, the memory module comprising:
- a first memory device having a first data signal line and a first data strobe signal line;
- a second memory device having a second data signal line and a second data strobe signal line;
- a common data signal line connectable to the computer system;
- and
- a device electrically coupled to the first data signal line, to the second data signal line, and to the common data signal line, the device selectively electrically coupling the first data signal line to the common data signal line and selectively electrically coupling the second data signal line to the common data signal line, the device comprising logic which translates between a system memory domain of the computer system and a physical memory domain of the memory module, wherein the system memory domain is compatible to a first memory density per memory device, and the physical memory domain is compatible with a second memory density per memory device equal to twice the first memory density per memory device.
2 more elements
Dependencies are inferred from the claim text.