G06F 11/1032
Simple parity
Official title: {Simple parity}
G06F11/1032 (Simple parity) appears on 191 US grants and 151 published applications in this corpus.
Search patents in G06F- Granted patents
- 191
- Published applications
- 151
- Assignees
- 90
- Inventors
- 351
- Latest grant
- 11 Aug 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 2 | 0 |
| 1977 | 1 | 0 |
| 1978 | 1 | 0 |
| 1979 | 1 | 0 |
| 1980 | 0 | 0 |
| 1981 | 2 | 0 |
| 1982 | 1 | 0 |
| 1983 | 0 | 0 |
| 1984 | 2 | 0 |
| 1985 | 1 | 0 |
| 1986 | 1 | 0 |
| 1987 | 1 | 0 |
| 1988 | 2 | 0 |
| 1989 | 0 | 0 |
| 1990 | 1 | 0 |
| 1991 | 1 | 0 |
| 1992 | 2 | 0 |
| 1993 | 0 | 0 |
| 1994 | 2 | 0 |
| 1995 | 3 | 0 |
| 1996 | 3 | 0 |
| 1997 | 5 | 0 |
| 1998 | 1 | 0 |
| 1999 | 2 | 0 |
| 2000 | 0 | 0 |
| 2001 | 2 | 3 |
| 2002 | 3 | 2 |
| 2003 | 5 | 3 |
| 2004 | 2 | 4 |
| 2005 | 3 | 9 |
| 2006 | 9 | 13 |
| 2007 | 7 | 8 |
| 2008 | 11 | 6 |
| 2009 | 4 | 6 |
| 2010 | 8 | 2 |
| 2011 | 3 | 1 |
| 2012 | 4 | 3 |
| 2013 | 4 | 3 |
| 2014 | 1 | 13 |
| 2015 | 7 | 4 |
| 2016 | 8 | 6 |
| 2017 | 8 | 3 |
| 2018 | 3 | 3 |
| 2019 | 4 | 9 |
| 2020 | 9 | 6 |
| 2021 | 13 | 16 |
| 2022 | 12 | 10 |
| 2023 | 12 | 7 |
| 2024 | 8 | 5 |
| 2025 | 4 | 5 |
| 2026 | 2 | 1 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Pausing memory system based on critical event11 Aug 2026US 12,705,129 B2Micron Technology, Inc.
- Apparatuses, systems, and methods for error correction11 Aug 2026US 12,705,135 B2
- Memory system with error detection19 Aug 2025US 12,394,500 B2Rambus Inc.
- Dynamic rain for zoned storage systems1 Jul 2025US 12,346,614 B2Micron Technology, Inc.
- Semiconductor device with modified access and associated methods and systems10 Jun 2025US 12,326,781 B2
- Storage device and operating method of storage device14 May 2026US 2026/0133706 A1Samsung Electronics Co., Ltd.
- Semiconductor memory device including error correction circuit2 Oct 2025US 2025/0307075 A1Samsung Electronics Co., Ltd.
- Semiconductor device with modified access and associated methods and systems28 Aug 2025US 2025/0272190 A1Lodestar Licensing Group LLC
- Pausing memory system based on critical event20 Mar 2025US 2025/0094263 A1Micron Technology, Inc.
- Storage controller for recovering data using bit combinations and method of operating the same16 Jan 2025US 2025/0021427 A1SK hynix Inc.
Most cited
By later US patents
- Single in-line memory module180US 4,656,605 AWang Laboratories, Inc. · 1987
- On-chip error detection and correction system for an embedded non-volatile memory array and method of operation178US 6,216,251 B1Motorola, Inc. · 2001
- Fault-tolerant hierarchical bus system and method of operating same138US 5,666,480 AMonolithic System Technology, Inc. · 1997
- Defect tolerant integrated circuit subsystem for communication between a module and a bus controller in a wafer-scale integrated circuit system126US 5,592,632 AMonolithic System Technology, Inc. · 1997
- Method and circuit for communication between a module and a bus controller in a wafer-scale integrated circuit system89US 5,613,077 AMonolithic System Technology, Inc. · 1997