Y10S 438/965
Shaped junction formation
Y10S438/965 (Shaped junction formation) appears on 135 US grants and 5 published applications in this corpus.
Search patents in Y10S- Granted patents
- 135
- Published applications
- 5
- Assignees
- 58
- Inventors
- 223
- Latest grant
- 13 Dec 2011
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 6 | 0 |
| 1977 | 2 | 0 |
| 1978 | 4 | 0 |
| 1979 | 4 | 0 |
| 1980 | 1 | 0 |
| 1981 | 6 | 0 |
| 1982 | 4 | 0 |
| 1983 | 3 | 0 |
| 1984 | 2 | 0 |
| 1985 | 3 | 0 |
| 1986 | 1 | 0 |
| 1987 | 9 | 0 |
| 1988 | 9 | 0 |
| 1989 | 3 | 0 |
| 1990 | 4 | 0 |
| 1991 | 7 | 0 |
| 1992 | 7 | 0 |
| 1993 | 0 | 0 |
| 1994 | 8 | 0 |
| 1995 | 10 | 0 |
| 1996 | 11 | 0 |
| 1997 | 10 | 0 |
| 1998 | 5 | 0 |
| 1999 | 5 | 0 |
| 2000 | 1 | 0 |
| 2001 | 4 | 0 |
| 2002 | 0 | 0 |
| 2003 | 1 | 2 |
| 2004 | 0 | 0 |
| 2005 | 1 | 1 |
| 2006 | 0 | 1 |
| 2007 | 3 | 1 |
| 2008 | 0 | 0 |
| 2009 | 0 | 0 |
| 2010 | 0 | 0 |
| 2011 | 1 | 0 |
By publication year. Applications have been published since 2001.
Recent patents
- Passivation structure with voltage equalizing loops13 Dec 2011US 8,076,672 B2International Rectifier Corporation
- Large area semiconductor detector with internal gain11 Sep 2007US 7,268,339 B1Radiation Monitoring Devices, Inc.
- Semiconductor system having a pn transition and method for manufacturing a semiconductor system3 Apr 2007US 7,199,031 B2Robert Bosch GmbH
- Passivation structure with voltage equalizing loops27 Feb 2007US 7,183,626 B2International Rectifier Corporation
- Low-voltage punch-through bi-directional transient-voltage suppression devices having surface breakdown protection and methods of making the same22 Feb 2005US 6,858,510 B2General Semiconductor, Inc.
- Passivation structure with voltage equalizing loops31 May 2007US 2007/0120224 A1International Rectifier Corporation
- Passivation structure with voltage equalizing loops18 May 2006US 2006/0102984 A1International Rectifier Corporation
- Semiconductor arrangement comprising a pn-transition and method for producing a semiconductor arrangement9 Jun 2005US 2005/0121690 A1Robert Bosch GmbH
- Low- voltage punch-through bi-directional transient-voltage suppression devices having surface breakdown protection and methods of making the same6 Nov 2003US 2003/0205775 A1General Semiconductor, Inc.
- Low-voltage punch-through bi-directional transient-voltage suppression devices having surface breakdown protection and methods of making the same16 Jan 2003US 2003/0010995 A1General Semiconductor, Inc.
Most cited
By later US patents
- Fabrication of submicron semiconductor devices121US 4,356,623 ATexas Instruments Incorporated · 1982
- Method for fabricating a short channel trenched DMOS transistor110US 5,474,943 ASiliconix Incorporated · 1995
- Solar cells and methods for manufacture thereof109US 4,322,571 AThe Boeing Company · 1982
- Method of making high breakdown voltage semiconductor device99US 4,927,772 AGeneral Electric Company · 1990
- Method of fabricating a MOSFET with graded source and drain regions88US 4,728,617 AIntel Corporation · 1988