Fabrication of submicron semiconductor devices
AssigneeTexas Instruments Incorporated
InventorWilliam R. Hunter
Life of this patent
Estimating the term…
Abstract
A method for fabricating a semiconductor device of relatively small scale. A conductivity layer is deposited on a substrate of a polarity. Regions of opposite polarity are partially formed on either side of the conductor layer. Vertical layers are formed to partially cover the regions of opposite polarity and are located adjacent to the conductor layer. Extensions of the regions of opposite polarity are formed such that a portion of the extension is defined by the location of the vertical layers.
Claims25
A method for fabricating a semiconductor device comprising the steps of:
- a. forming a conductor layer on the surface of a semiconductor substrate of one polarity between areas where regions of opposite polarity from said substrate are to be formed in said substrate,
- b. partially forming said regions of opposite polarity,
- c. forming vertical layers adjacent to said conductor layer,
- d. forming extensions of said regions of opposite polarity partially defined by said vertical layers, said extensions having the same polarity as said regions partially defined by said vertical layers, and
- e. forming contacts on said extensions.
A method for fabricating a semiconductor device comprising the steps of:
- a. forming a conductor layer on the surface of a semiconductor substrate of one polarity between areas where regions of opposite polarity from said substrate are to be formed in said substrate,
- b. forming first vertical layers adjacent to said conductor layer,
- c. partially forming said regions of opposite polarity,
- d. forming second vertical layers adjacent to said first vertical layers,
- e. forming extensions of said regions of opposite polarity, partially defined by said first and second vertical layer, said extensions having the same polarity as the regions partially defined by said vertical layers, and
- f. forming contacts on said extensions.
A method for fabricating a field effect device comprising the steps of:
- a. forming the gate on the substrate between areas where the source and the drain regions are to be formed,
- b. partially forming the source and the drain regions,
- c. forming vertical layers adjacent to said gate,
- d. forming extensions to source and drain regions partially defined by said vertical layers, said extensions having the same polarity as said regions partially defined by said vertical layers, and
- e. forming contacts on said extensions.
A method for fabricating a field effect device comprising the steps of:
- a. forming the gate on the substrate between areas where the source and the drain regions are to be formed,
- b. forming first vertical layers adjacent to said gate,
- c. partially forming the source and the drain regions,
- d. forming second vertical layers adjacent to said first vertical layers,
- e. forming extensions to source and drain regions partially defined by said first and second vertical layers, said extensions having the same polarity as the regions partially defined by said first and second vertical layers, and
- f. forming contacts on said extensions.
A method for fabricating a field effect device comprising the steps of:
- a. forming the gate on the substrate between areas where the source and the drain regions are to be formed
- b. partially forming said source and drain regions by ion implantation,
- c. depositing a conformal layer on top of said gate,
- d. anisotropically etching the said conformal layer, and,
- e. forming extensions to the source and drain by second ion implantation.
A method for fabricating a field effect device comprising the steps of:
- a. forming the gate on the substrate to define areas where the source and drain regions are to be formed,
- b. depositing first conformal layer on top of said gate,
- c. anisotropically etching the first conformal layer,
- d. partially forming said source and drain regions by ion implantation,
- e. depositing second conformal layer on top of said gate and remaining first conformal layer,
- f. anisotropically etching said second conformal layer, and
- g. forming extensions to source and drain regions by second ion implantation.
Dependencies are inferred from the claim text.