Y10S 148/102
Mask alignment
Y10S148/102 (Mask alignment) appears on 85 US grants and 4 published applications in this corpus.
Search patents in Y10S- Granted patents
- 85
- Published applications
- 4
- Assignees
- 46
- Inventors
- 141
- Latest grant
- 21 Oct 2003
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 1 | 0 |
| 1977 | 1 | 0 |
| 1978 | 1 | 0 |
| 1979 | 1 | 0 |
| 1980 | 0 | 0 |
| 1981 | 0 | 0 |
| 1982 | 0 | 0 |
| 1983 | 0 | 0 |
| 1984 | 1 | 0 |
| 1985 | 1 | 0 |
| 1986 | 4 | 0 |
| 1987 | 3 | 0 |
| 1988 | 1 | 0 |
| 1989 | 2 | 0 |
| 1990 | 3 | 0 |
| 1991 | 5 | 0 |
| 1992 | 7 | 0 |
| 1993 | 3 | 0 |
| 1994 | 5 | 0 |
| 1995 | 5 | 0 |
| 1996 | 10 | 0 |
| 1997 | 3 | 0 |
| 1998 | 10 | 0 |
| 1999 | 8 | 0 |
| 2000 | 4 | 0 |
| 2001 | 2 | 2 |
| 2002 | 1 | 2 |
| 2003 | 3 | 0 |
By publication year. Applications have been published since 2001.
Recent patents
- Method of producing exposure mask21 Oct 2003US 6,635,549 B2Kabushiki Kaisha Toshiba
- Semiconductor wafer, wafer alignment patterns and method of forming wafer alignment patterns12 Aug 2003US 6,605,516 B2
- Semiconductor processing methods and structures for determining alignment during semiconductor wafer processing8 Apr 2003US 6,544,859 B2Koninklijke Philips Electronics N. V.
- Semiconductor processing methods and structures for determining alignment during semiconductor wafer processing15 Oct 2002US 6,465,322 B2Koninklijke Philips Electronics N. V.
- Stage and supporting mechanism for supporting movable mirror on stage24 Jul 2001US 6,264,165 B1Nikon Corporation
- Semiconductor processing methods and structures for determining alignment during semiconductor wafer processing25 Apr 2002US 2002/0048922 A1Koninklijke Philips Electronics N. V.
- Method of producing exposure mask28 Mar 2002US 2002/0037625 A1Kabushiki Kaisha Toshiba
- Semiconductor processing methods and structures for determining alignment during semiconductor wafer processing13 Dec 2001US 2001/0051441 A1Koninklijke Philips Electronics N. V.
- Semiconductor wafer, wafer alignment patterns and method of forming wafer alignment patterns12 Jul 2001US 2001/0007786 A1
Most cited
By later US patents
- Edge overlay measurement target for sub-0.5 micron ground rules135US 5,712,707 AInternational Business Machines Corporation · 1998
- Fabrication of self-aligned, T-gate HEMT90US 5,053,348 AHughes Aircraft Company · 1991
- Method of providing mask alignment marks76US 5,316,966 AU. S. Philips Corporation · 1994
- Chemical-mechanical alignment mark and method of fabrication68US 5,503,962 ACypress Semiconductor Corporation · 1996
- Method of forming wafer alignment patterns63US 6,046,094 AMicron Technology, Inc. · 2000