Y10S 148/085
Isolated-integrated
Y10S148/085 (Isolated-integrated) appears on 213 US grants and 1 published applications in this corpus.
Search patents in Y10S- Granted patents
- 213
- Published applications
- 1
- Assignees
- 57
- Inventors
- 298
- Latest grant
- 27 Feb 2001
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 58 | 0 |
| 1977 | 32 | 0 |
| 1978 | 19 | 0 |
| 1979 | 4 | 0 |
| 1980 | 6 | 0 |
| 1981 | 6 | 0 |
| 1982 | 10 | 0 |
| 1983 | 4 | 0 |
| 1984 | 5 | 0 |
| 1985 | 13 | 0 |
| 1986 | 19 | 0 |
| 1987 | 9 | 0 |
| 1988 | 1 | 0 |
| 1989 | 1 | 0 |
| 1990 | 1 | 0 |
| 1991 | 1 | 0 |
| 1992 | 5 | 0 |
| 1993 | 0 | 0 |
| 1994 | 3 | 0 |
| 1995 | 5 | 0 |
| 1996 | 3 | 0 |
| 1997 | 0 | 0 |
| 1998 | 3 | 0 |
| 1999 | 3 | 0 |
| 2000 | 1 | 0 |
| 2001 | 1 | 1 |
By publication year. Applications have been published since 2001.
Recent patents
- Vertical transistor having top and bottom surface isolation27 Feb 2001US 6,194,773 B1Texas Instruments Incorporated
- Method of fabricating integrated circuits with oxidized isolation25 Jul 2000US 6,093,620 ANational Semiconductor Corporation
- Damascene isolation of CMOS transistors9 Nov 1999US 5,981,326 A
- Fabrication of semiconductor structure having two levels of buried regions4 May 1999US 5,899,714 ANational Semiconductor Corporation
- Semiconductor structure having two levels of buried regions30 Mar 1999US 5,889,315 ANational Semiconductor Corporation
Most cited
By later US patents
- Complementary, isolated DMOS IC technology319US 5,156,989 ASiliconix Incorporated · 1992
- Semiconductor structure having two levels of buried regions185US 5,889,315 ANational Semiconductor Corporation · 1999
- Fabrication of semiconductor structure having two levels of buried regions159US 5,899,714 ANational Semiconductor Corporation · 1999
- Isolated DMOS IC technology137US 5,485,027 ASiliconix Incorporated · 1996
- BICDMOS structures126US 5,426,328 ASiliconix Incorporated · 1995