H10D 84/955
Twin-tub technology
Official title: {Twin-tub technology}
H10D84/955 (Twin-tub technology) appears on 79 US grants and 89 published applications in this corpus.
Search patents in H10D- Granted patents
- 79
- Published applications
- 89
- Assignees
- 3
- Inventors
- 24
- Latest grant
- 28 Jan 2025
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 2007 | 0 | 1 |
| 2008 | 1 | 0 |
| 2009 | 0 | 1 |
| 2010 | 1 | 58 |
| 2011 | 16 | 0 |
| 2012 | 41 | 0 |
| 2013 | 1 | 8 |
| 2014 | 3 | 0 |
| 2015 | 2 | 2 |
| 2016 | 3 | 3 |
| 2017 | 1 | 5 |
| 2018 | 3 | 3 |
| 2019 | 2 | 4 |
| 2020 | 0 | 1 |
| 2021 | 3 | 1 |
| 2022 | 0 | 0 |
| 2023 | 0 | 0 |
| 2024 | 1 | 1 |
| 2025 | 1 | 1 |
By publication year.
Recent patents
- Semiconductor device including standard cells28 Jan 2025US 12,211,851 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Semiconductor device including standard cells19 Mar 2024US 11,935,893 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Integrated circuit with mixed row heights19 Oct 2021US 11,152,348 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Semiconductor device including standard cells18 May 2021US 11,011,545 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Semiconductor device including standard cells having different cell height4 May 2021US 10,998,340 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Semiconductor device including standard cells10 Apr 2025US 2025/0120176 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Semiconductor device including standard cells6 Jun 2024US 2024/0186326 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Semiconductor device including standard cells19 Aug 2021US 2021/0257388 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Semiconductor device including standard cells16 Apr 2020US 2020/0119048 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Staggered self aligned gate contact15 Aug 2019US 2019/0252408 A1QUALCOMM Incorporated
Most cited
By later US patents
- Dynamic array architecture227US 7,446,352 B2Tela Innovations, Inc. · 2008
- Integrated circuit having gate electrode level region including at least four linear-shaped conductive structures with some outer-contacted linear-shaped conductive structures having larger outer extending portion than inner extending portion159US 8,134,184 B2Tela Innovations, Inc. · 2012
- Dynamic array architecture142US 7,842,975 B2Tela Innovations, Inc. · 2010
- Semiconductor device having at least three linear-shaped electrode level conductive features of equal length positioned side-by-side at equal pitch141US 8,058,671 B2Tela Innovations, Inc. · 2011
- Semiconductor device and associated layouts having transistors formed from linear conductive segment with non-active neighboring linear conductive segment140US 7,910,958 B2Tela Innovations, Inc. · 2011