H03L 7/104
Using an additional signal from outside the loop for setting or controlling
Official title: {using an additional signal from outside the loop for setting or controlling a parameter in the loop (H03L7/107, H03L7/12 take precedence)}
H03L7/104 (Using an additional signal from outside the loop for setting or controlling) appears on 290 US grants and 228 published applications in this corpus.
Search patents in H03L- Granted patents
- 290
- Published applications
- 228
- Assignees
- 167
- Inventors
- 572
- Latest grant
- 2 Jun 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1977 | 1 | 0 |
| 1978 | 0 | 0 |
| 1979 | 1 | 0 |
| 1980 | 2 | 0 |
| 1981 | 0 | 0 |
| 1982 | 0 | 0 |
| 1983 | 0 | 0 |
| 1984 | 0 | 0 |
| 1985 | 1 | 0 |
| 1986 | 0 | 0 |
| 1987 | 0 | 0 |
| 1988 | 2 | 0 |
| 1989 | 0 | 0 |
| 1990 | 0 | 0 |
| 1991 | 0 | 0 |
| 1992 | 0 | 0 |
| 1993 | 0 | 0 |
| 1994 | 3 | 0 |
| 1995 | 3 | 0 |
| 1996 | 0 | 0 |
| 1997 | 1 | 0 |
| 1998 | 2 | 0 |
| 1999 | 1 | 0 |
| 2000 | 4 | 0 |
| 2001 | 2 | 0 |
| 2002 | 7 | 7 |
| 2003 | 6 | 5 |
| 2004 | 12 | 6 |
| 2005 | 6 | 14 |
| 2006 | 16 | 12 |
| 2007 | 1 | 6 |
| 2008 | 13 | 8 |
| 2009 | 12 | 8 |
| 2010 | 9 | 9 |
| 2011 | 10 | 9 |
| 2012 | 12 | 11 |
| 2013 | 13 | 10 |
| 2014 | 14 | 13 |
| 2015 | 14 | 16 |
| 2016 | 25 | 6 |
| 2017 | 9 | 8 |
| 2018 | 2 | 4 |
| 2019 | 10 | 12 |
| 2020 | 26 | 18 |
| 2021 | 14 | 14 |
| 2022 | 14 | 12 |
| 2023 | 6 | 5 |
| 2024 | 7 | 5 |
| 2025 | 3 | 4 |
| 2026 | 6 | 6 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Modified control loop in a digital phase-locked loop2 Jun 2026US 12,647,121 B2Skyworks Solutions, Inc.
- Fast calibration of phase lock loops5 May 2026US 12,620,994 B2Credo Technology Group Limited
- Reduce DCO frequency overlap-induced limit cycle in hybrid and digital PLLS7 Apr 2026US 12,597,937 B2Microchip Technology Incorporated
- Analog-to-digital converter (ADC) clock phase continuity across user equipment microsleep mode17 Feb 2026US 12,556,188 B2QUALCOMM Incorporated
- Phase-locked loop control circuit, phase-locked loop circuit and control method thereof20 Jan 2026US 12,531,561 B2Realtek Semiconductor Corp.
- Phase-locked loop circuit, storage device including the phase-locked loop circuit, and operation method of the storage device13 Aug 2026US 2026/0236187 A1Samsung Electronics Co., Ltd.
- Reduce dco frequency overlap-induced limit cycle in hybrid and digital plls6 Aug 2026US 2026/0230079 A1Microchip Technology Incorporated
- Method for starting up a phase-locked loop, and corresponding integrated circuit23 Jul 2026US 2026/0213757 A1STMicroelectronics International N. V.
- Adaptive phase lock loop with fast lock for supply voltage droop2 Jul 2026US 2026/0189238 A1Microsoft Technology Licensing, LLC
- Analog-to-digital converter (adc) clock phase continuity across user equipment microsleep mode25 Jun 2026US 2026/0180584 A1QUALCOMM Incorporated
Most cited
By later US patents
- Two-way TDMA telemetry system with power conservation features724US 5,748,103 AVitalcom, Inc. · 1998
- Low-power circuit and method for providing rapid frequency lock in a wireless communications device281US 5,767,791 AVitalcom, Inc. · 1998
- Phase-lock loop-based clocking system, methods and apparatus88US 8,581,643 B1LightLab Imaging, Inc. · 2013
- Method for phase locking in a phase lock loop78US 6,744,323 B1Cypress Semiconductor Corporation · 2004
- Delay stage-interweaved analog DLL/PLL74US 7,149,145 B2Micron Technology, Inc. · 2006