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US 2026/0230079 A1Published application
Reduce dco frequency overlap-induced limit cycle in hybrid and digital plls
AssigneeMicrochip Technology Incorporated
InventorsYoucef Fouzar, Waleed El-halwagy, William Roberts, Kristopher Kshonze, Faizal Warsalee
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Abstract
A method includes: observing that a digitally controlled oscillator (DCO) frequency is at a boundary of a DCO frequency overlap region; and bypassing at least a portion of the DCO frequency overlap region.
Claims20
A method comprising:
- observing a phase error signal generated by a phase locked loop (PLL) having an output signal that is at least partially governed by digitally controlled oscillator (DCO) control codes and being represented by a relationship between DCO control code values and time over a duration of time;
- observing, at about the time T0, a first change from a first value to a second value in the relationship between DCO control code values and the time over the duration of time such that a third value lies between the first value and the second value;
- observing, at about the time T0, a second change defined as a DCO frequency overlap region occurring between the third value and the second value;
- and
- eliminating at least a portion of the DCO frequency overlap region at a boundary of the DCO frequency overlap region at about the time T0 by eliminating, at about the time T0, a signal disturbance corresponding to the DCO frequency overlap region, wherein exactly at about the time T0 the DCO frequency overlap region has identical DCO control codes as compared to DCO control codes in a DCO frequency non-overlap region between the first value and the third value.
2 more elements
An apparatus comprising:
- a phase locked loop (PLL) capable of generating a digital phase error signal, wherein the PLL having an output signal that is at least partially governed by digitally controlled oscillator (DCO) control codes;
- an accumulator present in the PLL such that an accumulator gain can be adjusted;
- a circuit to:
- monitor an accumulator output of the accumulator to detect when a DCO frequency boundary is reached;
- observe the digitally controlled oscillator (DCO) control codes to determine when a DCO control code being utilized to set a DCO frequency matches a DCO control code value associated with the DCO frequency boundary of a DCO frequency overlap region having a corresponding value or a corresponding range of values of the DCO control code;
- perform a jump in the accumulator gain at the DCO frequency boundary based on a direction of an integral path (increment/decrement) by switching the accumulator gain to a higher value at the DCO frequency boundary in order to bypass one or more DCO control code values associated with a portion of the DCO frequency overlap region by jumping at least some of the one or more DCO control code values;
- and
- restore the accumulator gain to its nominal value after the jump in the accumulator gain is performed.
5 more elements
Dependencies are inferred from the claim text.