G11C 7/24
Memory cell safety or protection circuits
Official title: Memory cell safety or protection circuits, e.g. arrangements for preventing inadvertent reading or writing; Status cells; Test cells
G11C7/24 (Memory cell safety or protection circuits) appears on 1,189 US grants and 1,067 published applications in this corpus.
Search patents in G11C- Granted patents
- 1,189
- Published applications
- 1,067
- Assignees
- 363
- Inventors
- 2,049
- Latest grant
- 29 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1981 | 1 | 0 |
| 1982 | 0 | 0 |
| 1983 | 1 | 0 |
| 1984 | 2 | 0 |
| 1985 | 0 | 0 |
| 1986 | 8 | 0 |
| 1987 | 2 | 0 |
| 1988 | 3 | 0 |
| 1989 | 15 | 0 |
| 1990 | 16 | 0 |
| 1991 | 8 | 0 |
| 1992 | 7 | 0 |
| 1993 | 9 | 0 |
| 1994 | 15 | 0 |
| 1995 | 12 | 0 |
| 1996 | 14 | 0 |
| 1997 | 11 | 0 |
| 1998 | 16 | 0 |
| 1999 | 20 | 0 |
| 2000 | 21 | 0 |
| 2001 | 18 | 6 |
| 2002 | 13 | 14 |
| 2003 | 8 | 19 |
| 2004 | 18 | 23 |
| 2005 | 18 | 22 |
| 2006 | 18 | 29 |
| 2007 | 21 | 45 |
| 2008 | 23 | 21 |
| 2009 | 28 | 32 |
| 2010 | 29 | 25 |
| 2011 | 26 | 18 |
| 2012 | 21 | 23 |
| 2013 | 19 | 21 |
| 2014 | 31 | 28 |
| 2015 | 17 | 29 |
| 2016 | 36 | 26 |
| 2017 | 40 | 52 |
| 2018 | 44 | 51 |
| 2019 | 64 | 80 |
| 2020 | 89 | 113 |
| 2021 | 84 | 84 |
| 2022 | 74 | 66 |
| 2023 | 74 | 94 |
| 2024 | 85 | 79 |
| 2025 | 75 | 53 |
| 2026 | 35 | 14 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Flexible SRAM pre-charge systems and methods for minimizing leakage and reducing power consumption29 Sep 2026US 12,749,517 B2Microsft Technology Licensing, LLC
- Training procedure change determination to detect attack25 Aug 2026US 12,717,901 B2Micron Technology, Inc.
- Configurable data protection circuitry for memory devices25 Aug 2026US 12,718,850 B2Micron Technology, Inc.
- Configurable interface circuitry25 Aug 2026US 12,718,851 B2Xilinx, Inc.
- RAM true random number generator9 Jun 2026US 12,650,814 B2GSI Technology, Inc.
- Apparatus including circuit usage detection mechanism and methods of manufacturing the same13 Aug 2026US 2026/0237451 A1Micron Technology, Inc.
- Probabilistic-bit device with a wide input range2 Jul 2026US 2026/0187505 A1
- Rram device as physical unclonable function device and manufacturing method18 Jun 2026US 2026/0171150 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Buffer device with low-latency skid mode for data freshness11 Jun 2026US 2026/0162701 A1Rambus Inc.
- Broadcast circuit for fuse array, broadcast method for fuse array, and memory apparatus11 Jun 2026US 2026/0162758 A1CXMT Corporation
Most cited
By later US patents
- Tamper resistant module with logical elements arranged on a substrate to protect information stored in the same module1,198US 5,309,387 A1994
- Tamper resistant module having logical elements arranged in multiple layers on the outer surface of a substrate to protect stored information197US 5,185,717 A1993
- Method and device for selectively locking write access to blocks in a memory array using write protect inputs and block enabled status160US 5,592,641 AIntel Corporation · 1997
- Row hammer monitoring based on stored row hammer threshold value149US 9,032,141 B22015
- Anti-tamper bond wire shield for an integrated circuit147US 5,861,662 AGeneral Instrument Corporation · 1999