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US 12,650,814 B2Granted
RAM true random number generator
AssigneeGSI Technology, Inc.
InventorsLee-Lean Shu, Dan Ilan, Tomer Sery, Avidan Akerib
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Abstract
A system to generate true random numbers includes a RAM array, a null-read controller and a hash generator. The RAM array has memory cells and a sense amplifier. The memory cells store data therein, the cells are connected in rows to word lines and in columns to pairs of bit lines, and the sense amplifier senses a differential input signal. The null-read controller implements a null-read operation by the sense amplifier of a portion of the RAM array. The hash generator receives a null-read result from the null-read operation and outputs a partial true random number based on the null-read result.
Claims31
A true random number generator system, the system comprising:
- a random access memory (RAM) array having memory cells for storing data therein, said memory cells being connected in rows to word lines and in columns to pairs of bit lines, and a sense amplifier to sense a differential input signal, wherein said differential input signal is on one of:
- said pairs of bit lines when connected to said sense amplifier, and a pair of local data lines when connected to said sense amplifier;
- a null-read controller to implement at least one null-read operation by said sense amplifier of at least a portion of said RAM array;
- and
- a hash generator to receive at least one null-read result from said at least one null-read operation and to output at least a partial true random number based on said at least one null read result,
- wherein said null-read controller comprises:
- a differential voltage conditioner (DVC) to minimize sense amplifier offset voltage in said sense amplifier during said at least one null-read operation;
- and
- a word line overrider (WLO) to stop a row controller activating connected word lines during a null-read of said differential input signal on one of said pairs of bit lines, said connected word lines being connected to said rows of said memory cells.
6 more elements
A true random number generator system, the system comprising:
- a random access memory (RAM) array having memory cells for storing data therein, said memory cells being connected in rows to word lines and in columns to pairs of bit lines, and a sense amplifier to sense a differential input signal, wherein said differential input signal is on one of:
- said pairs of bit lines when connected to said sense amplifier, and a pair of local data lines when connected to said sense amplifier;
- a null-read controller to implement at least one null-read operation by said sense amplifier of at least a portion of said RAM array;
- and
- a hash generator to receive at least one null-read result from said at least one null-read operation and to output at least a partial true random number based on said at least one null read result,
- wherein said null-read controller comprises:
- a differential voltage conditioner (DVC) to minimize sense amplifier offset voltage in said at least one sense amplifier during said at least one null-read operation;
- and
- a column controller to stop column pass gates connecting said one of said pairs of bit lines to said pair of local data lines during a null read of said differential input signal on said pairs of local data lines.
6 more elements
A method for a RAM (random access memory) array, the method comprising:
- executing a null-read operation, wherein said executing a null-read operation comprises:
- pre-charging a pair of differential lines in said RAM array to a predetermined voltage;
- and
- differentially reading a differential signal on said pair of differential lines by a sense amplifier without receiving a second differential signal from a memory cell onto said pair of differential lines after said pre-charging,
- wherein said pair of differential lines is one of:
- a pair of bit lines when attached to said sense amplifier, and a pair of local data lines when attached to said sense amplifier, and
- wherein said differentially reading comprises one of:
- enabling a word line address disable (WLAD) signal to disable all word line activations by a row decoder, and enabling an unconnected word line selection (UWLS) signal such that a row controller activates only unconnected word lines which are said word lines that are not connected to rows of said memory cells.
5 more elements
A method for a RAM (random access memory) array, the method comprising:
- executing a null-read operation, wherein said executing a null-read operation comprises:
- pre-charging a pair of differential lines in said RAM array to a predetermined voltage;
- and
- differentially reading a differential signal on said pair of differential lines by a sense amplifier without receiving a second differential signal from a memory cell onto said pair of differential lines after said pre-charging,
- wherein said pair of differential lines is one of:
- a pair of bit lines when attached to said sense amplifier, and a pair of local data lines when attached to said sense amplifier, and
- wherein said differentially reading comprises stopping column pass gates connecting pairs of bit lines to a pair of local data lines, said pairs of bit lines also being connected to said columns of said memory cells.
4 more elements
A method to generate a true random number, the method comprising:
- pre-charging at least one pair of differential lines in at least a portion of a RAM array to a predetermined voltage;
- null-reading a differential signal on said at least one pair of differential lines;
- receiving at least one null-read result from said null-reading;
- and
- generating at least a partial true random number based on said at least one null-read result,
- wherein said at least one pair of differential lines is one of:
- a pair of bit lines when attached to a sense amplifier, and a pair of local data lines when attached to said sense amplifier,
- wherein said null-reading comprises differentially reading the differential signal on said at least one pair of differential lines by said sense amplifier, without receiving a second differential signal from a memory cell onto said at least one pair of differential lines after said pre-charging, and
- wherein said differentially reading comprises one of:
- enabling a word line address disable (WLAD) signal to disable all word line activations by a row decoder, and enabling an unconnected word line selection (UWLS) signal such that a row controller activates only unconnected word lines which are said word lines that are not connected to rows of said memory cells.
7 more elements
A method to generate a true random number, the method comprising:
- pre-charging at least one pair of differential lines in at least a portion of a RAM array to a predetermined voltage;
- null-reading a differential signal on said at least one pair of differential lines;
- receiving at least one null-read result from said null-reading;
- and
- generating at least a partial true random number based on said at least one null-read result,
- wherein said at least one pair of differential lines is one of:
- a pair of bit lines when attached to a sense amplifier, and a pair of local data lines when attached to said sense amplifier,
- wherein said null-reading comprises differentially reading the differential signal on said at least one pair of differential lines by said sense amplifier, without receiving a second differential signal from a memory cell onto said at least one pair of differential lines after said pre-charging, and
- wherein said differentially reading comprises stopping column pass gates connecting pairs of bit lines to a pair of local data lines, said pairs of bit lines also being connected to said columns of said memory cells.
6 more elements
Dependencies are inferred from the claim text.