G11C 7/20

Memory cell initialisation circuits

Official title: Memory cell initialisation circuits, e.g. when powering up or down, memory clear, latent image memory

G11C7/20 (Memory cell initialisation circuits) appears on 1,585 US grants and 1,430 published applications in this corpus.

Search patents in G11C
Granted patents
1,585
Published applications
1,430
Assignees
327
Inventors
2,316
Latest grant
1 Sep 2026

Filings by year

G11C 7/20: granted patents and published applications per publication year
YearGranted patentsPublished applications
197710
197830
197940
198020
198100
198230
198350
198420
198510
198660
198740
198850
1989120
199060
1991140
199260
199390
1994140
1995100
199660
199720
199850
1999110
2000240
20012411
20022532
20032935
20043433
20053055
20064458
20074966
20085250
20094750
20104942
20114640
20124945
20134551
20145467
20157375
20167367
20178537
20186370
20198198
20208766
20218296
20227581
20237882
20247065
20255634
20263024

By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.

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