G11C 2216/28

Floating gate memory programmed by reverse programming

Official title: Floating gate memory programmed by reverse programming, e.g. programmed with negative gate voltage and erased with positive gate voltage or programmed with high source or drain voltage and erased with high gate voltage

G11C2216/28 (Floating gate memory programmed by reverse programming) appears on 23 US grants and 12 published applications in this corpus.

Search patents in G11C
Granted patents
23
Published applications
12
Assignees
17
Inventors
46
Latest grant
23 Dec 2025

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G11C 2216/28: granted patents and published applications per publication year
YearGranted patentsPublished applications
198310
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198600
198700
198800
198900
199000
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199200
199310
199420
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200311
200400
200502
200620
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201300
201401
201510
201601
201710
201820
201901
202010
202110
202201
202310
202403
202521

By publication year. Applications have been published since 2001.

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