Memory device and operating method thereof
AssigneeSK hynix Inc.
InventorHee Youl LEE
Life of this patent
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Abstract
There are provided a memory device and an operating method thereof. The memory device includes: a memory block including a plurality of memory cells; and a peripheral circuit for performing a program operation and an erase operation on the memory block. The program operation is performed by using a hole injection method, and the erase operation is performed by using an electron charging method. The plurality of memory cells are programmed when a threshold voltage of each of at least some of the plurality of memory cells is decreased to be less than a set level in the program operation, and are erased when the threshold voltage of each of the plurality of memory cells is increased to be the set level or higher in the erase operation.
Claims20
A memory device comprising:
- a memory block including a plurality of memory cells;
- and
- a peripheral circuit configured to perform a program operation and an erase operation on the memory block, wherein the program operation is performed by using a hole injection method, and the erase operation is performed by using an electron charging method,
- wherein the plurality of memory cells are programmed when a threshold voltage of each of at least some of the plurality of memory cells is decreased to be less than a set level in the program operation, and are erased when the threshold voltage of each of the plurality of memory cells is increased to be the set level or higher in the erase operation.
A method for operating a memory device, the method comprising:
- programming memory cells in an erase state, which are coupled to a selected word line in a memory block when the threshold voltage of each of the memory cells is decreased to be less than the set level by using a hole injection method,
- wherein each of the memory cells in the erase state has a threshold voltage greater than or equal to a set voltage level.
A method for operating a memory device, the method comprising:
- erasing memory cells in a program state, which are coupled to at least one selected word line in a memory block when a threshold voltage of each of the memory cells is increased to be the set level or higher by using an electron charging method,
- wherein each of the memory cells in the program state has a threshold voltage less than a set voltage level.
Dependencies are inferred from the claim text.