Memories and operation methods thereof, memory systems and electronic devices

A memory, comprising:

• a memory cell array comprising memory strings each comprising memory cells, a drain selective transistor, and a source selective transistor;
• and
• a peripheral circuit configured to:
• apply a pass voltage to word lines coupled to unselected memory cells of a memory string of the memory strings according to a program order of a selected memory cell of the memory string when performing a read operation on the selected memory cell of the memory string, the pass voltage comprising a first voltage and a second voltage, the first voltage applied to word lines coupled to first unselected memory cells of the memory string is greater than the second voltage applied to word lines coupled to second unselected memory cells of the memory string, wherein the first unselected memory cells include unselected memory cells between the selected memory cell and the source selective transistor, and the second unselected memory cells include unselected memory cells between the selected memory cell and the drain selective transistor;
• and
• in a program operation, program the memory cells of the memory strings, wherein the earlier the program order of the selected memory cells, the greater the pass voltage applied to the word lines coupled to the unselected memory cells of the memory string during the read operation.

A memory system, characterized in that, the memory system comprises:

• a memory cell array comprising memory strings each comprising memory cells, a drain selective transistor, and a source selective transistor;
• and
• a peripheral circuit configured to:
• apply a pass voltage to word lines coupled to unselected memory cells of a memory string of the memory strings according to a program order of a selected memory cell of the memory string when performing a read operation on the selected memory cell of the memory string, the pass voltage comprises a first voltage and a second voltage, the first voltage applied to word lines coupled to first unselected memory cells of the memory string is greater than the second voltage applied to word lines coupled to second unselected memory cells of the memory string, wherein the first unselected memory cells include unselected memory cells between the selected memory cell and the source selective transistor, and the second unselected memory cells include unselected memory cells between the selected memory cell and the drain selective transistor;
• and
• in a program operation, program the memory cells of the memory strings, wherein the earlier the program order of the selected memory cells, the greater the pass voltage applied to the word lines coupled to the unselected memory cells of the memory string during the read operation;
• and
• a controller coupled to the memory and configured to control the memory system.