G11C 2216/22
Nonvolatile memory in which reading can be carried out from one memory
Official title: Nonvolatile memory in which reading can be carried out from one memory bank or array whilst a word or sector in another bank or array is being erased or programmed simultaneously
G11C2216/22 (Nonvolatile memory in which reading can be carried out from one memory) appears on 187 US grants and 162 published applications in this corpus.
Search patents in G11C- Granted patents
- 187
- Published applications
- 162
- Assignees
- 70
- Inventors
- 293
- Latest grant
- 23 Jun 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1988 | 1 | 0 |
| 1989 | 0 | 0 |
| 1990 | 0 | 0 |
| 1991 | 0 | 0 |
| 1992 | 0 | 0 |
| 1993 | 1 | 0 |
| 1994 | 1 | 0 |
| 1995 | 0 | 0 |
| 1996 | 0 | 0 |
| 1997 | 0 | 0 |
| 1998 | 3 | 0 |
| 1999 | 3 | 0 |
| 2000 | 7 | 0 |
| 2001 | 10 | 4 |
| 2002 | 10 | 9 |
| 2003 | 17 | 21 |
| 2004 | 11 | 17 |
| 2005 | 21 | 15 |
| 2006 | 11 | 11 |
| 2007 | 9 | 9 |
| 2008 | 11 | 6 |
| 2009 | 5 | 5 |
| 2010 | 6 | 6 |
| 2011 | 5 | 4 |
| 2012 | 8 | 6 |
| 2013 | 3 | 3 |
| 2014 | 5 | 4 |
| 2015 | 2 | 3 |
| 2016 | 3 | 0 |
| 2017 | 1 | 3 |
| 2018 | 2 | 7 |
| 2019 | 7 | 9 |
| 2020 | 5 | 7 |
| 2021 | 8 | 5 |
| 2022 | 2 | 3 |
| 2023 | 5 | 0 |
| 2024 | 1 | 1 |
| 2025 | 1 | 2 |
| 2026 | 2 | 2 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Semiconductor device and simultaneous block operations method using multiple source lines23 Jun 2026US 12,665,039 B2SK hynix Inc.
- Solid state drive with concurrent read execution and erase execution17 Mar 2026US 12,578,867 B2Microchip Technology Incorporated
- Background operations in memory18 Feb 2025US 12,229,449 B2
- Concurrent memory access operations3 Dec 2024US 12,159,664 B2Arm Limited
- Memory device28 Nov 2023US 11,830,558 B2Samsung Electronics Co., Ltd.
- Solid state drive with concurrent read execution and erase execution26 Feb 2026US 2026/0056665 A1Microchip Technology Incorporated
- Apparatuses systems and methods for linked bank refresh5 Feb 2026US 2026/0038562 A1Micron Technology, Inc.
- Semiconductor device and operation method using the same5 Jun 2025US 2025/0182832 A1SK hynix Inc.
- Background operations in memory15 May 2025US 2025/0156121 A1Lodestar Licensing Group LLC
- Background operations in memory1 Aug 2024US 2024/0256182 A1Lodestar Licensing Group LLC
Most cited
By later US patents
- Multiple bank simultaneous operation for a flash memory204US 6,240,040 B1Advanced Micro Devices, Inc. · 2001
- Pipelined parallel programming operation in a non-volatile memory system170US 6,871,257 B2SanDisk Corporation · 2005
- Memory sensing circuit and method for low voltage operation170US 7,046,568 B2SanDisk Corporation · 2006
- Flash memory with multiple status reading capability138US 6,442,076 B1Micron Technology, Inc. · 2002
- Floating gate nonvolatile memory with reading while writing capability134US 5,245,572 AIntel Corporation · 1993