G11C 11/0605
With non-destructive read-out
Official title: {with non-destructive read-out}
G11C11/0605 (With non-destructive read-out) appears on 9 US grants and 8 published applications in this corpus.
Search patents in G11C- Granted patents
- 9
- Published applications
- 8
- Assignees
- 8
- Inventors
- 29
- Latest grant
- 7 Jul 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1977 | 1 | 0 |
| 1978 | 1 | 0 |
| 1979 | 0 | 0 |
| 1980 | 0 | 0 |
| 1981 | 0 | 0 |
| 1982 | 1 | 0 |
| 1983 | 0 | 0 |
| 1984 | 0 | 0 |
| 1985 | 0 | 0 |
| 1986 | 0 | 0 |
| 1987 | 0 | 0 |
| 1988 | 0 | 0 |
| 1989 | 0 | 0 |
| 1990 | 0 | 0 |
| 1991 | 0 | 0 |
| 1992 | 0 | 0 |
| 1993 | 0 | 0 |
| 1994 | 0 | 0 |
| 1995 | 0 | 0 |
| 1996 | 0 | 0 |
| 1997 | 0 | 0 |
| 1998 | 0 | 0 |
| 1999 | 0 | 0 |
| 2000 | 1 | 0 |
| 2001 | 0 | 0 |
| 2002 | 0 | 0 |
| 2003 | 0 | 0 |
| 2004 | 0 | 0 |
| 2005 | 0 | 0 |
| 2006 | 0 | 0 |
| 2007 | 0 | 0 |
| 2008 | 0 | 0 |
| 2009 | 0 | 0 |
| 2010 | 0 | 0 |
| 2011 | 0 | 0 |
| 2012 | 0 | 0 |
| 2013 | 0 | 0 |
| 2014 | 0 | 0 |
| 2015 | 1 | 2 |
| 2016 | 1 | 0 |
| 2017 | 0 | 0 |
| 2018 | 0 | 0 |
| 2019 | 0 | 0 |
| 2020 | 1 | 1 |
| 2021 | 0 | 0 |
| 2022 | 0 | 1 |
| 2023 | 1 | 0 |
| 2024 | 0 | 2 |
| 2025 | 0 | 0 |
| 2026 | 1 | 2 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Semiconductor memory device with even and odd coplanar wordlines7 Jul 2026US 12,676,195 B2Kioxia Corporation
- Hardware accelerator with analog-content addressable memory (a-CAM) for decision tree computation28 Mar 2023US 11,615,827 B2Hewlett Packard Enterprise Development LP
- Reducing post-read disturb in a nonvolatile memory device28 Jul 2020US 10,726,891 B1Western Digital Technologies, Inc.
- Memory devices with local and global devices at substantially the same level above stacked tiers of memory cells and methods2 Feb 2016US 9,251,860 B2Micron Technology, Inc.
- Memory devices with local and global devices at substantially the same level above stacked tiers of memory cells and methods30 Jun 2015US 9,070,442 B2Micron Technology, Inc.
- Boundary offset control for memory block reading16 Jul 2026US 2026/0204328 A1Micron Technology, Inc.
- Greater than Binary State Digital Logic for Superconductive Circuits14 May 2026US 2026/0134918 A1Massachusetts Institute of Technology
- Semiconductor memory device26 Dec 2024US 2024/0428866 A1Kioxia Corporation
- Memory device for signed multi-bit to multi-bit multiplications12 Sep 2024US 2024/0304254 A1Micron Technology, Inc.
- Hardware accelerator with analog-content addressable memory (a-cam) for decision tree computation21 Apr 2022US 2022/0122646 A1Hewlett Packard Enterprise Development LP
Most cited
By later US patents
- Data storing apparatus including integrated magnetic memory cells and semiconductor devices24US 6,166,944 AKyoto University · 2000
- Memory devices with local and global devices at substantially the same level above stacked tiers of memory cells and methods17US 9,070,442 B2Micron Technology, Inc. · 2015
- Reducing post-read disturb in a nonvolatile memory device13US 10,726,891 B1Western Digital Technologies, Inc. · 2020
- Hardware accelerator with analog-content addressable memory (a-CAM) for decision tree computation3US 11,615,827 B2Hewlett Packard Enterprise Development LP · 2023
- Memory devices with local and global devices at substantially the same level above stacked tiers of memory cells and methods1US 9,251,860 B2Micron Technology, Inc. · 2016