G06F 9/381
Loop buffering
Official title: {Loop buffering}
G06F9/381 (Loop buffering) appears on 304 US grants and 297 published applications in this corpus.
Search patents in G06F- Granted patents
- 304
- Published applications
- 297
- Assignees
- 112
- Inventors
- 581
- Latest grant
- 8 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1986 | 2 | 0 |
| 1987 | 1 | 0 |
| 1988 | 1 | 0 |
| 1989 | 2 | 0 |
| 1990 | 1 | 0 |
| 1991 | 1 | 0 |
| 1992 | 3 | 0 |
| 1993 | 2 | 0 |
| 1994 | 2 | 0 |
| 1995 | 4 | 0 |
| 1996 | 4 | 0 |
| 1997 | 4 | 0 |
| 1998 | 7 | 0 |
| 1999 | 4 | 0 |
| 2000 | 3 | 0 |
| 2001 | 3 | 1 |
| 2002 | 5 | 10 |
| 2003 | 13 | 17 |
| 2004 | 15 | 10 |
| 2005 | 8 | 12 |
| 2006 | 13 | 10 |
| 2007 | 10 | 8 |
| 2008 | 4 | 14 |
| 2009 | 6 | 11 |
| 2010 | 11 | 9 |
| 2011 | 8 | 4 |
| 2012 | 3 | 12 |
| 2013 | 6 | 7 |
| 2014 | 5 | 18 |
| 2015 | 10 | 11 |
| 2016 | 20 | 17 |
| 2017 | 14 | 8 |
| 2018 | 8 | 11 |
| 2019 | 13 | 17 |
| 2020 | 8 | 16 |
| 2021 | 17 | 12 |
| 2022 | 16 | 11 |
| 2023 | 12 | 17 |
| 2024 | 15 | 17 |
| 2025 | 11 | 8 |
| 2026 | 9 | 9 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Method and apparatus for permuting streamed data elements8 Sep 2026US 12,730,758 B2Texas Instruments Incorporated
- Repeat instruction for loading and/or executing code in a claimable repeat cache a specified number of times11 Aug 2026US 12,705,055 B2Graphcore Limited
- Prefetch request generation19 May 2026US 12,632,256 B2Arm Limited
- Method and apparatus to sort a vector for a bitonic sorting algorithm5 May 2026US 12,619,553 B2Texas Instruments Incorporated
- Looping instruction21 Apr 2026US 12,608,206 B2Xmos Ltd
- Systems and methods for early exit from a static loop nest25 Jun 2026US 2026/0178332 A1Meta Platforms Technologies, LLC
- Sorting vector elements using a mapping of elements21 May 2026US 2026/0140887 A1
- Streaming engine with early exit from loop levels supporting early exit loops and irregular loops7 May 2026US 2026/0127000 A1Texas Instruments Incorporated
- Loop detector and predictor26 Mar 2026US 2026/0086805 A1Ampere Computing LLC
- Method and apparatus for implied bit handling in floating point multiplication12 Feb 2026US 2026/0044456 A1Texas Instruments Incorporated
Most cited
By later US patents
- Dynamic flow instruction cache memory organized around trace segments independent of virtual address line132US 5,381,533 AIntel Corporation · 1995
- Disk drive employing enhanced instruction cache management to facilitate non-sequential immediate operands131US 7,055,000 B1Western Digital Technologies, Inc. · 2006
- Instruction prefetch buffer control119US 4,714,994 AInternational Business Machines Corporation · 1987
- High performance microprocessor having variable speed system clock104US 5,809,336 APatriot Scientific Corporation · 1998
- Highly integrated scalable, flexible DSP megamodule architecture85US 9,606,803 B2Texas Instruments Incorporated · 2017