Disk drive employing enhanced instruction cache management to facilitate non-sequential immediate operands
AssigneeWestern Digital Technologies, Inc.
InventorEric L. Severtson
Life of this patent
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Abstract
A disk drive is disclosed for executing a program comprising a plurality of instructions. The disk drive comprises a primary memory for storing the instructions, and a cache memory for caching the instructions. The cache management is enhanced by not re-filling the cache due to accessing a non-sequential immediate operand.
Claims12
A disk drive for executing a program comprising a plurality of instructions, the disk drive comprising:
- (a) a disk;
- (b) a head actuated over the disk;
- (c) a primary memory for storing a plurality of the instructions;
- (d) a cache memory for caching a subset of the instructions stored in the primary memory;
- (e) a microprocessor for executing the instructions;
- and
- (f) a memory controller for transferring the instructions to the microprocessor, wherein:
- the memory controller transfers an instruction from the cache memory to the microprocessor if the instruction is stored in the cache memory;
- the memory controller transfers the instruction from the primary memory to the microprocessor if the instruction is not stored in the cache memory;
- and
- the memory controller replaces at least one instruction stored in the cache memory with an instruction stored in the primary memory if:
- the memory controller transfers a first instruction and a second instruction to the microprocessor;
- the first instruction and second instruction have sequential addresses;
- and
- the second instruction is transferred from the primary memory.
A method of executing a program in a disk drive, the program comprising a plurality of instructions, the disk drive comprising a disk, a head actuated over the disk, a primary memory for storing the plurality of the instructions, a cache memory for caching a subset of the instructions stored in the primary memory, and a microprocessor for executing the instructions, the method comprising the steps of:
- (a) transferring an instruction from the cache memory to the microprocessor if the instruction is stored in the cache memory;
- (b) transferring the instruction from the primary memory to the microprocessor if the instruction is not stored in the cache memory;
- and
- (c) replacing at least one instruction stored in the cache memory with an instruction stored in the primary memory if:
- a first instruction and a second instruction are transferred to the microprocessor;
- the first instruction and second instruction have sequential addresses;
- and
- the second instruction is transferred from the primary memory.
Dependencies are inferred from the claim text.